From: tip-bot for Joerg Roedel <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: tglx@linutronix.de, eduval@amazon.com, bp@alien8.de,
torvalds@linux-foundation.org, aarcange@redhat.com,
jkosina@suse.cz, pavel@ucw.cz, David.Laight@aculab.com,
mingo@kernel.org, jpoimboe@redhat.com, brgerst@gmail.com,
luto@kernel.org, jgross@suse.com, dvlasenk@redhat.com,
hpa@zytor.com, dhgutteridge@sympatico.ca, peterz@infradead.org,
jroedel@suse.de, dave.hansen@intel.com,
boris.ostrovsky@oracle.com, will.deacon@arm.com,
gregkh@linuxfoundation.org, llong@redhat.com,
linux-kernel@vger.kernel.org
Subject: [tip:x86/pti] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points
Date: Thu, 19 Jul 2018 16:24:40 -0700 [thread overview]
Message-ID: <tip-e464fb9f241ddf46815b31ca594af96f2699a78e@git.kernel.org> (raw)
In-Reply-To: <1531906876-13451-13-git-send-email-joro@8bytes.org>
Commit-ID: e464fb9f241ddf46815b31ca594af96f2699a78e
Gitweb: https://git.kernel.org/tip/e464fb9f241ddf46815b31ca594af96f2699a78e
Author: Joerg Roedel <jroedel@suse.de>
AuthorDate: Wed, 18 Jul 2018 11:40:49 +0200
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Fri, 20 Jul 2018 01:11:39 +0200
x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points
Add unconditional cr3 switches between user and kernel cr3 to all non-NMI
entry and exit points.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Pavel Machek <pavel@ucw.cz>
Cc: "H . Peter Anvin" <hpa@zytor.com>
Cc: linux-mm@kvack.org
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Eduardo Valentin <eduval@amazon.com>
Cc: Greg KH <gregkh@linuxfoundation.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: aliguori@amazon.com
Cc: daniel.gruss@iaik.tugraz.at
Cc: hughd@google.com
Cc: keescook@google.com
Cc: Andrea Arcangeli <aarcange@redhat.com>
Cc: Waiman Long <llong@redhat.com>
Cc: "David H . Gutteridge" <dhgutteridge@sympatico.ca>
Cc: joro@8bytes.org
Link: https://lkml.kernel.org/r/1531906876-13451-13-git-send-email-joro@8bytes.org
---
arch/x86/entry/entry_32.S | 86 ++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 82 insertions(+), 4 deletions(-)
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index dbf7d619dcd6..60b28dfa00dc 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -77,6 +77,8 @@
#endif
.endm
+#define PTI_SWITCH_MASK (1 << PAGE_SHIFT)
+
/*
* User gs save/restore
*
@@ -154,6 +156,33 @@
#endif /* CONFIG_X86_32_LAZY_GS */
+/* Unconditionally switch to user cr3 */
+.macro SWITCH_TO_USER_CR3 scratch_reg:req
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
+
+ movl %cr3, \scratch_reg
+ orl $PTI_SWITCH_MASK, \scratch_reg
+ movl \scratch_reg, %cr3
+.Lend_\@:
+.endm
+
+/*
+ * Switch to kernel cr3 if not already loaded and return current cr3 in
+ * \scratch_reg
+ */
+.macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
+ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
+ movl %cr3, \scratch_reg
+ /* Test if we are already on kernel CR3 */
+ testl $PTI_SWITCH_MASK, \scratch_reg
+ jz .Lend_\@
+ andl $(~PTI_SWITCH_MASK), \scratch_reg
+ movl \scratch_reg, %cr3
+ /* Return original CR3 in \scratch_reg */
+ orl $PTI_SWITCH_MASK, \scratch_reg
+.Lend_\@:
+.endm
+
.macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0
cld
PUSH_GS
@@ -283,7 +312,6 @@
#endif /* CONFIG_X86_ESPFIX32 */
.endm
-
/*
* Called with pt_regs fully populated and kernel segments loaded,
* so we can access PER_CPU and use the integer registers.
@@ -296,11 +324,19 @@
*/
#define CS_FROM_ENTRY_STACK (1 << 31)
+#define CS_FROM_USER_CR3 (1 << 30)
.macro SWITCH_TO_KERNEL_STACK
ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV
+ SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
+
+ /*
+ * %eax now contains the entry cr3 and we carry it forward in
+ * that register for the time this macro runs
+ */
+
/* Are we on the entry stack? Bail out if not! */
movl PER_CPU_VAR(cpu_entry_area), %ecx
addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
@@ -370,7 +406,8 @@
* but switch back to the entry-stack again when we approach
* iret and return to the interrupted code-path. This usually
* happens when we hit an exception while restoring user-space
- * segment registers on the way back to user-space.
+ * segment registers on the way back to user-space or when the
+ * sysenter handler runs with eflags.tf set.
*
* When we switch to the task-stack here, we can't trust the
* contents of the entry-stack anymore, as the exception handler
@@ -387,6 +424,7 @@
*
* %esi: Entry-Stack pointer (same as %esp)
* %edi: Top of the task stack
+ * %eax: CR3 on kernel entry
*/
/* Calculate number of bytes on the entry stack in %ecx */
@@ -402,6 +440,14 @@
/* Mark stackframe as coming from entry stack */
orl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
+ /*
+ * Test the cr3 used to enter the kernel and add a marker
+ * so that we can switch back to it before iret.
+ */
+ testl $PTI_SWITCH_MASK, %eax
+ jz .Lcopy_pt_regs_\@
+ orl $CS_FROM_USER_CR3, PT_CS(%esp)
+
/*
* %esi and %edi are unchanged, %ecx contains the number of
* bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate
@@ -468,7 +514,7 @@
/*
* This macro handles the case when we return to kernel-mode on the iret
- * path and have to switch back to the entry stack.
+ * path and have to switch back to the entry stack and/or user-cr3
*
* See the comments below the .Lentry_from_kernel_\@ label in the
* SWITCH_TO_KERNEL_STACK macro for more details.
@@ -514,6 +560,18 @@
/* Safe to switch to entry-stack now */
movl %ebx, %esp
+ /*
+ * We came from entry-stack and need to check if we also need to
+ * switch back to user cr3.
+ */
+ testl $CS_FROM_USER_CR3, PT_CS(%esp)
+ jz .Lend_\@
+
+ /* Clear marker from stack-frame */
+ andl $(~CS_FROM_USER_CR3), PT_CS(%esp)
+
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
.Lend_\@:
.endm
/*
@@ -707,7 +765,20 @@ ENTRY(xen_sysenter_target)
* 0(%ebp) arg6
*/
ENTRY(entry_SYSENTER_32)
+ /*
+ * On entry-stack with all userspace-regs live - save and
+ * restore eflags and %eax to use it as scratch-reg for the cr3
+ * switch.
+ */
+ pushfl
+ pushl %eax
+ SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
+ popl %eax
+ popfl
+
+ /* Stack empty again, switch to task stack */
movl TSS_entry2task_stack(%esp), %esp
+
.Lsysenter_past_esp:
pushl $__USER_DS /* pt_regs->ss */
pushl %ebp /* pt_regs->sp (stashed in bp) */
@@ -786,6 +857,9 @@ ENTRY(entry_SYSENTER_32)
/* Switch to entry stack */
movl %eax, %esp
+ /* Now ready to switch the cr3 */
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
/*
* Restore all flags except IF. (We restore IF separately because
* STI gives a one-instruction window in which we won't be interrupted,
@@ -866,7 +940,11 @@ restore_all:
.Lrestore_all_notrace:
CHECK_AND_APPLY_ESPFIX
.Lrestore_nocheck:
- RESTORE_REGS 4 # skip orig_eax/error_code
+ /* Switch back to user CR3 */
+ SWITCH_TO_USER_CR3 scratch_reg=%eax
+
+ /* Restore user state */
+ RESTORE_REGS pop=4 # skip orig_eax/error_code
.Lirq_return:
/*
* ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
next prev parent reply other threads:[~2018-07-19 23:25 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-18 9:40 [PATCH 00/39 v8] PTI support for x86-32 Joerg Roedel
2018-07-18 9:40 ` [PATCH 01/39] x86/asm-offsets: Move TSS_sp0 and TSS_sp1 to asm-offsets.c Joerg Roedel
2018-07-19 23:18 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 02/39] x86/entry/32: Rename TSS_sysenter_sp0 to TSS_entry2task_stack Joerg Roedel
2018-07-19 23:19 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 03/39] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler Joerg Roedel
2018-07-19 23:19 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 04/39] x86/entry/32: Put ESPFIX code into a macro Joerg Roedel
2018-07-19 23:20 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 05/39] x86/entry/32: Unshare NMI return path Joerg Roedel
2018-07-19 23:21 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 06/39] x86/entry/32: Split off return-to-kernel path Joerg Roedel
2018-07-19 23:21 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 07/39] x86/entry/32: Enter the kernel via trampoline stack Joerg Roedel
2018-07-18 18:09 ` Brian Gerst
2018-07-19 20:52 ` Thomas Gleixner
2018-07-19 23:22 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 08/39] x86/entry/32: Leave " Joerg Roedel
2018-07-19 23:22 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 09/39] x86/entry/32: Introduce SAVE_ALL_NMI and RESTORE_ALL_NMI Joerg Roedel
2018-07-19 23:23 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 10/39] x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack Joerg Roedel
2018-07-19 23:23 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-10-12 18:29 ` [PATCH 10/39] " Jan Kiszka
2018-10-13 9:54 ` [PATCH] x86/entry/32: Fix setup of CS high bits Jan Kiszka
2018-10-13 15:12 ` Andy Lutomirski
2018-10-15 13:08 ` Jan Kiszka
2018-10-15 13:14 ` David Laight
2018-10-15 13:18 ` Jan Kiszka
2018-10-15 13:29 ` David Laight
2018-10-15 9:10 ` Joerg Roedel
2018-10-15 14:09 ` [PATCH v2] " Jan Kiszka
2018-10-15 15:09 ` [tip:x86/urgent] x86/entry/32: Clear the " tip-bot for Jan Kiszka
2018-10-18 6:21 ` tip-bot for Jan Kiszka
2018-07-18 9:40 ` [PATCH 11/39] x86/entry/32: Simplify debug entry point Joerg Roedel
2018-07-19 23:24 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 12/39] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points Joerg Roedel
2018-07-19 23:24 ` tip-bot for Joerg Roedel [this message]
2018-07-18 9:40 ` [PATCH 13/39] x86/entry/32: Add PTI cr3 switches to NMI handler code Joerg Roedel
2018-07-19 23:25 ` [tip:x86/pti] x86/entry/32: Add PTI CR3 " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 14/39] x86/entry: Rename update_sp0 to update_task_stack Joerg Roedel
2018-07-19 23:25 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 15/39] x86/pgtable: Rename pti_set_user_pgd to pti_set_user_pgtbl Joerg Roedel
2018-07-19 23:26 ` [tip:x86/pti] x86/pgtable: Rename pti_set_user_pgd() to pti_set_user_pgtbl() tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 16/39] x86/pgtable/pae: Unshare kernel PMDs when PTI is enabled Joerg Roedel
2018-07-19 23:26 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 17/39] x86/pgtable/32: Allocate 8k page-tables " Joerg Roedel
2018-07-19 23:27 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 18/39] x86/pgtable: Move pgdp kernel/user conversion functions to pgtable.h Joerg Roedel
2018-07-19 23:27 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 19/39] x86/pgtable: Move pti_set_user_pgtbl() " Joerg Roedel
2018-07-19 23:28 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 20/39] x86/pgtable: Move two more functions from pgtable_64.h " Joerg Roedel
2018-07-19 23:28 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 21/39] x86/mm/pae: Populate valid user PGD entries Joerg Roedel
2018-07-19 23:29 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:40 ` [PATCH 22/39] x86/mm/pae: Populate the user page-table with user pgd's Joerg Roedel
2018-07-19 23:30 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 23/39] x86/mm/legacy: " Joerg Roedel
2018-07-19 23:30 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 24/39] x86/mm/pti: Add an overflow check to pti_clone_pmds() Joerg Roedel
2018-07-19 23:31 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 25/39] x86/mm/pti: Define X86_CR3_PTI_PCID_USER_BIT on x86_32 Joerg Roedel
2018-07-19 23:31 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 26/39] x86/mm/pti: Clone CPU_ENTRY_AREA on PMD level " Joerg Roedel
2018-07-19 23:32 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 27/39] x86/mm/pti: Make pti_clone_kernel_text() compile on 32 bit Joerg Roedel
2018-07-19 23:32 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 28/39] x86/mm/pti: Keep permissions when cloning kernel text in pti_clone_kernel_text() Joerg Roedel
2018-07-19 23:33 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 29/39] x86/mm/pti: Introduce pti_finalize() Joerg Roedel
2018-07-19 23:33 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 30/39] x86/mm/pti: Clone entry-text again in pti_finalize() Joerg Roedel
2018-07-19 23:34 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 31/39] x86/mm/dump_pagetables: Define INIT_PGD Joerg Roedel
2018-07-19 23:34 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 32/39] x86/pgtable/pae: Use separate kernel PMDs for user page-table Joerg Roedel
2018-07-19 23:35 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-10-05 14:06 ` [PATCH 32/39] " Arnd Bergmann
2018-07-18 9:41 ` [PATCH 33/39] x86/ldt: Reserve address-space range on 32 bit for the LDT Joerg Roedel
2018-07-19 23:35 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 34/39] x86/ldt: Define LDT_END_ADDR Joerg Roedel
2018-07-19 23:36 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 35/39] x86/ldt: Split out sanity check in map_ldt_struct() Joerg Roedel
2018-07-19 23:36 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 36/39] x86/ldt: Enable LDT user-mapping for PAE Joerg Roedel
2018-07-19 23:37 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 37/39] x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32 Joerg Roedel
2018-07-19 23:37 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 38/39] x86/mm/pti: Add Warning when booting on a PCID capable CPU Joerg Roedel
2018-07-19 23:38 ` [tip:x86/pti] " tip-bot for Joerg Roedel
2018-07-18 9:41 ` [PATCH 39/39] x86/entry/32: Add debug code to check entry/exit cr3 Joerg Roedel
2018-07-19 23:38 ` [tip:x86/pti] x86/entry/32: Add debug code to check entry/exit CR3 tip-bot for Joerg Roedel
2018-07-18 11:59 ` [PATCH 00/39 v8] PTI support for x86-32 Pavel Machek
2018-07-19 23:21 ` Thomas Gleixner
2018-07-20 7:59 ` Joerg Roedel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=tip-e464fb9f241ddf46815b31ca594af96f2699a78e@git.kernel.org \
--to=tipbot@zytor.com \
--cc=David.Laight@aculab.com \
--cc=aarcange@redhat.com \
--cc=boris.ostrovsky@oracle.com \
--cc=bp@alien8.de \
--cc=brgerst@gmail.com \
--cc=dave.hansen@intel.com \
--cc=dhgutteridge@sympatico.ca \
--cc=dvlasenk@redhat.com \
--cc=eduval@amazon.com \
--cc=gregkh@linuxfoundation.org \
--cc=hpa@zytor.com \
--cc=jgross@suse.com \
--cc=jkosina@suse.cz \
--cc=jpoimboe@redhat.com \
--cc=jroedel@suse.de \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=llong@redhat.com \
--cc=luto@kernel.org \
--cc=mingo@kernel.org \
--cc=pavel@ucw.cz \
--cc=peterz@infradead.org \
--cc=tglx@linutronix.de \
--cc=torvalds@linux-foundation.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).