From: Andrew Lunn <andrew@lunn.ch>
To: Maxime Chevallier <maxime.chevallier@bootlin.com>
Cc: davem@davemloft.net, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
linux-arm-kernel@lists.infradead.org,
Antoine Tenart <antoine.tenart@bootlin.com>,
thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com,
miquel.raynal@bootlin.com, nadavh@marvell.com,
stefanc@marvell.com, mw@semihalf.com
Subject: Re: [PATCH net-next 1/7] net: phy: Extract genphy_c45_read_abilities from marvell10g
Date: Sun, 20 Jan 2019 19:51:07 +0100 [thread overview]
Message-ID: <20190120185107.GA19714@lunn.ch> (raw)
In-Reply-To: <20190118152352.26417-2-maxime.chevallier@bootlin.com>
On Fri, Jan 18, 2019 at 04:23:46PM +0100, Maxime Chevallier wrote:
> Marvell 10G PHY driver has a generic way of initializing the supported
> link modes by reading the PHY's C45 PMA abilities. This can be made
> generic, since these registers are part of the 802.3 specifications.
>
> This commit extracts the config_init link_mode initialization code from
> marvell10g and uses it to introduce the genphy_c45_read_abilities
> function.
Hi Maxime
I think the idea is good. I just have a few English language
issues/questions.
Capabilities is more often used than abilities. I just wondered if
abilities is taken from the 802.3 specifications?
Also, i wonder if we should include _pma_ in the name? At some point
we might want to do something similar for other sublayers.
> +/**
> + * genphy_c45_read_abilities - read supported link modes from PMA
> + * @phydev: target phy_device struct
> + *
> + * Read the supported link modes from the PMA Status 2 (1.8) register. If bit
> + * 1.8.9 is set, the list of supported modes is completed with the values in the
completed is not the right word. 'is build using the values in the' ?
> + * PMA Extended Abilities (1.11) register, indicating 1000BASET an 10G related
> + * modes. If bit 1.11.14 is set, then the list is also completed with the modes
list is also extended with the modes
> + * in the 2.5G/5G PMA Extended register (1.21), indicating if 2.5GBASET and
> + * 5GBASET are supported.
> + */
Thanks
Andrew
next prev parent reply other threads:[~2019-01-20 18:51 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-18 15:23 [PATCH net-next 0/7] net: phy: Add support for 2.5GBASET PHYs Maxime Chevallier
2019-01-18 15:23 ` [PATCH net-next 1/7] net: phy: Extract genphy_c45_read_abilities from marvell10g Maxime Chevallier
2019-01-20 18:51 ` Andrew Lunn [this message]
2019-01-21 16:20 ` Maxime Chevallier
2019-01-21 16:28 ` Andrew Lunn
2019-01-18 15:23 ` [PATCH net-next 2/7] net: phy: Add generic support for 2.5GBaseT and 5GBaseT Maxime Chevallier
2019-01-18 15:23 ` [PATCH net-next 3/7] net: phy: Read 2.5G and 5G extended abilities Maxime Chevallier
2019-01-18 15:23 ` [PATCH net-next 4/7] net: phy: marvell10g: Add support for 2.5GBASET and 5GBASET Maxime Chevallier
2019-01-18 15:51 ` Russell King - ARM Linux admin
2019-01-21 20:17 ` Andrew Lunn
2019-01-22 10:08 ` Maxime Chevallier
2019-01-18 15:23 ` [PATCH net-next 5/7] net: phy: marvell10g: Force reading of 2.5/5G PMA extended abilities Maxime Chevallier
2019-01-20 19:08 ` Andrew Lunn
2019-01-21 10:35 ` Maxime Chevallier
2019-01-21 10:52 ` Russell King - ARM Linux admin
2019-01-21 12:29 ` Maxime Chevallier
2019-01-21 13:00 ` Russell King - ARM Linux admin
2019-01-28 14:26 ` Maxime Chevallier
2019-02-07 23:37 ` Russell King - ARM Linux admin
2019-01-18 15:23 ` [PATCH net-next 6/7] net: mvpp2: Add 2.5GBaseT support Maxime Chevallier
2019-01-18 15:23 ` [PATCH net-next 7/7] net: phy: marvell10g: add support for the 88x2110 PHY Maxime Chevallier
2019-01-20 19:10 ` Andrew Lunn
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