From: David Miller <davem@davemloft.net>
To: rahul.kundu@chelsio.com
Cc: netdev@vger.kernel.org, nirranjan@chelsio.com, dt@chelsio.com,
rajur@chelsio.com
Subject: Re: [PATCH net] cxgb4: Add support to catch bits set in INT_CAUSE5
Date: Wed, 25 Mar 2020 12:22:52 -0700 (PDT) [thread overview]
Message-ID: <20200325.122252.966436204777154509.davem@davemloft.net> (raw)
In-Reply-To: <4908cdd761d1eec90abd7b6815e07be1d243e5cd.1585137120.git.rahul.kundu@chelsio.com>
From: Rahul Kundu <rahul.kundu@chelsio.com>
Date: Wed, 25 Mar 2020 04:53:09 -0700
> This commit adds support to catch any bits set in SGE_INT_CAUSE5 for Parity Errors.
> F_ERR_T_RXCRC flag is used to ignore that particular bit as it is not considered as fatal.
> So, we clear out the bit before looking for error.
> This patch now read and report separately all three registers(Cause1, Cause2, Cause5).
> Also, checks for errors if any.
>
> Signed-off-by: Raju Rangoju <rajur@chelsio.com>
> Signed-off-by: Rahul Kundu <rahul.kundu@chelsio.com>
This doesn't seem like a critical bug fix at all so I applied it to net-next,
thank you.
prev parent reply other threads:[~2020-03-25 19:22 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-25 11:53 [PATCH net] cxgb4: Add support to catch bits set in INT_CAUSE5 Rahul Kundu
2020-03-25 19:22 ` David Miller [this message]
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