From: Andrew Lunn <andrew@lunn.ch>
To: "Van Leeuwen, Pascal" <pvanleeuwen@rambus.com>
Cc: Sabrina Dubroca <sd@queasysnail.net>,
Scott Dial <scott@scottdial.com>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
Ryan Cox <ryan_cox@byu.edu>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"davem@davemloft.net" <davem@davemloft.net>,
Antoine Tenart <antoine.tenart@bootlin.com>,
"ebiggers@google.com" <ebiggers@google.com>
Subject: Re: Severe performance regression in "net: macsec: preserve ingress frame ordering"
Date: Mon, 24 Aug 2020 15:01:42 +0200 [thread overview]
Message-ID: <20200824130142.GN2588906@lunn.ch> (raw)
In-Reply-To: <CY4PR0401MB365240B04FC43F7F8AAE6A0CC3560@CY4PR0401MB3652.namprd04.prod.outlook.com>
On Mon, Aug 24, 2020 at 09:07:26AM +0000, Van Leeuwen, Pascal wrote:
> No need to point this out to me as we're the number one supplier of inline MACsec IP :-)
> In fact, the Microsemi PHY solution you mention is ours, major parts of that design were
> even created by these 2 hands here.
Oh, O.K.
Do you know of other silicon vendors which are using the same IP?
Maybe we can encourage them to share the driver, rather than re-invent
the wheel, which often happens when nobody realises it is basically
the same core with a different wrapper.
Thanks
Andrew
next prev parent reply other threads:[~2020-08-24 13:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-06 21:11 Severe performance regression in "net: macsec: preserve ingress frame ordering" Ryan Cox
2020-08-07 3:48 ` Scott Dial
2020-08-07 23:21 ` Ryan Cox
2020-08-10 13:34 ` Sabrina Dubroca
2020-08-10 16:09 ` Scott Dial
2020-08-12 10:04 ` Sabrina Dubroca
2020-08-12 10:45 ` Van Leeuwen, Pascal
2020-08-12 12:42 ` Andrew Lunn
2020-08-24 9:07 ` Van Leeuwen, Pascal
2020-08-24 13:01 ` Andrew Lunn [this message]
2020-08-25 13:09 ` Van Leeuwen, Pascal
2020-08-25 13:33 ` Andrew Lunn
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