From: Jiawen Wu <jiawenwu@trustnetic.com>
To: netdev@vger.kernel.org, jarkko.nikula@linux.intel.com,
andriy.shevchenko@linux.intel.com,
mika.westerberg@linux.intel.com, jsd@semihalf.com,
Jose.Abreu@synopsys.com, andrew@lunn.ch, hkallweit1@gmail.com,
linux@armlinux.org.uk
Cc: linux-i2c@vger.kernel.org, linux-gpio@vger.kernel.org,
mengyuanlou@net-swift.com, Jiawen Wu <jiawenwu@trustnetic.com>
Subject: [RFC PATCH net-next v6 4/9] net: txgbe: Register I2C platform device
Date: Fri, 5 May 2023 15:42:23 +0800 [thread overview]
Message-ID: <20230505074228.84679-5-jiawenwu@trustnetic.com> (raw)
In-Reply-To: <20230505074228.84679-1-jiawenwu@trustnetic.com>
Register the platform device to use Designware I2C bus master driver.
Use regmap to read/write I2C device region from given base offset.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
drivers/net/ethernet/wangxun/Kconfig | 2 +
.../net/ethernet/wangxun/txgbe/txgbe_phy.c | 71 +++++++++++++++++++
.../net/ethernet/wangxun/txgbe/txgbe_type.h | 4 ++
3 files changed, 77 insertions(+)
diff --git a/drivers/net/ethernet/wangxun/Kconfig b/drivers/net/ethernet/wangxun/Kconfig
index a62614eeed2e..ec058a72afb6 100644
--- a/drivers/net/ethernet/wangxun/Kconfig
+++ b/drivers/net/ethernet/wangxun/Kconfig
@@ -40,6 +40,8 @@ config NGBE
config TXGBE
tristate "Wangxun(R) 10GbE PCI Express adapters support"
depends on PCI
+ select I2C_DESIGNWARE_PLATFORM
+ select REGMAP
select COMMON_CLK
select LIBWX
help
diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c b/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c
index 47509ad54e89..6cb58b82a8a8 100644
--- a/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c
+++ b/drivers/net/ethernet/wangxun/txgbe/txgbe_phy.c
@@ -1,7 +1,9 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) 2015 - 2023 Beijing WangXun Technology Co., Ltd. */
+#include <linux/platform_device.h>
#include <linux/gpio/property.h>
+#include <linux/regmap.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/i2c.h>
@@ -98,6 +100,65 @@ static int txgbe_clock_register(struct txgbe *txgbe)
return 0;
}
+static int txgbe_i2c_read(void *context, unsigned int reg, unsigned int *val)
+{
+ struct wx *wx = context;
+
+ *val = rd32(wx, reg + TXGBE_I2C_BASE);
+
+ return 0;
+}
+
+static int txgbe_i2c_write(void *context, unsigned int reg, unsigned int val)
+{
+ struct wx *wx = context;
+
+ wr32(wx, reg + TXGBE_I2C_BASE, val);
+
+ return 0;
+}
+
+static const struct regmap_config i2c_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_read = txgbe_i2c_read,
+ .reg_write = txgbe_i2c_write,
+};
+
+static int txgbe_i2c_register(struct txgbe *txgbe)
+{
+ struct platform_device_info info = {};
+ struct platform_device *i2c_dev;
+ struct wx *wx = txgbe->wx;
+ struct regmap *i2c_regmap;
+ struct resource res = {};
+ struct pci_dev *pdev;
+
+ pdev = wx->pdev;
+ i2c_regmap = devm_regmap_init(&pdev->dev, NULL, wx,
+ &i2c_regmap_config);
+ if (IS_ERR(i2c_regmap)) {
+ wx_err(wx, "failed to init regmap\n");
+ return PTR_ERR(i2c_regmap);
+ }
+
+ info.parent = &pdev->dev;
+ info.fwnode = software_node_fwnode(txgbe->nodes.group[SWNODE_I2C]);
+ info.name = "i2c_designware";
+ info.id = (pdev->bus->number << 8) | pdev->devfn;
+
+ res = DEFINE_RES_IRQ(pdev->irq);
+ info.res = &res;
+ info.num_res = 1;
+ i2c_dev = platform_device_register_full(&info);
+ if (IS_ERR(i2c_dev))
+ return PTR_ERR(i2c_dev);
+
+ txgbe->i2c_dev = i2c_dev;
+
+ return 0;
+}
+
int txgbe_init_phy(struct txgbe *txgbe)
{
int ret;
@@ -114,8 +175,17 @@ int txgbe_init_phy(struct txgbe *txgbe)
goto err_unregister_swnode;
}
+ ret = txgbe_i2c_register(txgbe);
+ if (ret) {
+ wx_err(txgbe->wx, "failed to init i2c interface: %d\n", ret);
+ goto err_unregister_clk;
+ }
+
return 0;
+err_unregister_clk:
+ clkdev_drop(txgbe->clock);
+ clk_unregister(txgbe->clk);
err_unregister_swnode:
software_node_unregister_node_group(txgbe->nodes.group);
@@ -124,6 +194,7 @@ int txgbe_init_phy(struct txgbe *txgbe)
void txgbe_remove_phy(struct txgbe *txgbe)
{
+ platform_device_unregister(txgbe->i2c_dev);
clkdev_drop(txgbe->clock);
clk_unregister(txgbe->clk);
software_node_unregister_node_group(txgbe->nodes.group);
diff --git a/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h b/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h
index cdbc4b37f832..55979abf01f2 100644
--- a/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h
+++ b/drivers/net/ethernet/wangxun/txgbe/txgbe_type.h
@@ -55,6 +55,9 @@
#define TXGBE_TS_CTL 0x10300
#define TXGBE_TS_CTL_EVAL_MD BIT(31)
+/* I2C registers */
+#define TXGBE_I2C_BASE 0x14900
+
/* Part Number String Length */
#define TXGBE_PBANUM_LENGTH 32
@@ -146,6 +149,7 @@ struct txgbe_nodes {
struct txgbe {
struct wx *wx;
struct txgbe_nodes nodes;
+ struct platform_device *i2c_dev;
struct clk_lookup *clock;
struct clk *clk;
};
--
2.27.0
next prev parent reply other threads:[~2023-05-05 7:31 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 7:42 [RFC PATCH net-next v6 0/9] TXGBE PHYLINK support Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 1/9] net: txgbe: Add software nodes to support phylink Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 2/9] i2c: designware: Add driver support for Wangxun 10Gb NIC Jiawen Wu
2023-05-05 18:48 ` andy.shevchenko
2023-05-05 20:10 ` andy.shevchenko
2023-05-06 9:29 ` Jiawen Wu
2023-05-06 11:34 ` Andy Shevchenko
2023-05-05 7:42 ` [RFC PATCH net-next v6 3/9] net: txgbe: Register fixed rate clock Jiawen Wu
2023-05-05 7:42 ` Jiawen Wu [this message]
2023-05-05 7:42 ` [RFC PATCH net-next v6 5/9] net: txgbe: Add SFP module identify Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 6/9] net: txgbe: Support GPIO to SFP socket Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 7/9] net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 8/9] net: txgbe: Implement phylink pcs Jiawen Wu
2023-05-05 7:42 ` [RFC PATCH net-next v6 9/9] net: txgbe: Support phylink MAC layer Jiawen Wu
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