RE: [PATCH net-next 00/19] Mellanox, mlx5 sub function support

[Parav Pandit <parav@mellanox.com>]

> -----Original Message-----
> From: Jakub Kicinski <jakub.kicinski@netronome.com>
 
> On Fri, 8 Nov 2019 13:12:33 +0100, Jiri Pirko wrote:
> > Thu, Nov 07, 2019 at 09:32:34PM CET, jakub.kicinski@netronome.com wrote:
> > >On Thu,  7 Nov 2019 10:04:48 -0600, Parav Pandit wrote:
> > >> Mellanox sub function capability allows users to create several
> > >> hundreds of networking and/or rdma devices without depending on PCI
> SR-IOV support.
> > >
> > >You call the new port type "sub function" but the devlink port
> > >flavour is mdev.
> > >
> > >As I'm sure you remember you nacked my patches exposing NFP's PCI sub
> > >functions which are just regions of the BAR without any mdev
> > >capability. Am I in the clear to repost those now? Jiri?
> >
> > Well question is, if it makes sense to have SFs without having them as
> > mdev? I mean, we discussed the modelling thoroughtly and eventually we
> > realized that in order to model this correctly, we need SFs on "a bus".
> > Originally we were thinking about custom bus, but mdev is already
> > there to handle this.
> 
> But the "main/real" port is not a mdev in your case. NFP is like mlx4.
> It has one PCI PF for multiple ports.
> 
> > Our SFs are also just regions of the BAR, same thing as you have.
> >
> > Can't you do the same for nfp SFs?
> > Then the "mdev" flavour is enough for all.
> 
> Absolutely not.
> 
Please explain what is missing in mdev.
And frankly it is too late for such a comment.
I sent out RFC patches back in March-19, 
further discussed in netdevconf0x13, 
further discussed several times while we introduced devlink ports,
further discussed in august with mdev alias series and phys_port_name formation for mdev.
This series shouldn't be any surprise for you at all.
Anyways.

> Why not make the main device of mlx5 a mdev, too, if that's acceptable.
> There's (a) long precedence for multiple ports on one PCI PF in networking
> devices, (b) plenty deployed software which depend on the main devices
> hanging off the PCI PF directly.
> 
> The point of mdevs is being able to sign them to VFs or run DPDK on them (map
> to user space).
> 
That can be one use case. That is not the only use case.
I clearly explained the use case scenarios in motivation section of the cover letter. Please go through it again.
This series is certainly not targeting the DPDK usecase right now.

Also please read design decisions section of cover letter...

> For normal devices existing sysfs hierarchy were one device has multiple
> children of a certain class, without a bus and a separate driver is perfectly fine.
> Do you think we should also slice all serial chips into mdevs if they have
> multiple lines.
> 
> Exactly as I predicted much confusion about what's being achieved here, heh :)

We don't see confusion here. Please be specific on the point that confuses you.
A PCI device is sliced to multiple devices to make use of it in different ways. Serial chips are not good example of it.
This is fitting in with 
- overall kernel bus-driver model, 
- suitable for multiple types of devices (netdev, rdma and their different link layers), 
- devlink framework of bus/device notion for health reporters, ports, resources
- mapping to VM/bare-metal/container usecase.
- and more..
I don't want to further repeat the cover-letter here.. let's talk specific points to improve upon.