From: Andy Duan <fugang.duan@nxp.com>
To: "Fuzzey, Martin" <martin.fuzzey@flowbird.group>
Cc: Andrew Lunn <andrew@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [EXT] Re: [PATCH net 3/4] ARM: dts: imx6: update fec gpr property to match new format
Date: Mon, 25 May 2020 02:29:28 +0000 [thread overview]
Message-ID: <AM6PR0402MB3607365FD8D754B5EDDD5242FFB30@AM6PR0402MB3607.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <CANh8QzwxfnQ1cACz=6dhYujEVtQoTCw8kTgkHi9BnxESptL=xQ@mail.gmail.com>
From: Fuzzey, Martin <martin.fuzzey@flowbird.group> Sent: Saturday, May 23, 2020 2:03 AM
> Hi Andy,
>
> On Fri, 22 May 2020, 03:01 Andy Duan, <fugang.duan@nxp.com> wrote:
> >
> > Andrew, many customers require the wol feature, NXP NPI release always
> > support the wol feature to match customers requirement.
> >
> > And some customers' board only design one ethernet instance based on
> > imx6sx/imx7d/
> > Imx8 serial, but which instance we never know, maybe enet1, maybe
> > enet2. So we should supply different values for gpr.
> >
> > So, it is very necessary to support wol feature for multiple instances.
> >
>
> Yes, I don't think anyone is saying otherwise.
>
> The problem is just that there are already .dtsi files for i.MX chips having
> multiple ethernet interfaces in the mainline kernel (at least imx6ui.dtsi,
> imx6sx.dts, imx7d.dtsi) but that this patch series does not modify those files
> to use the new DT format.
>
For imx6ul/imx6sx/imx7d/imx8mq/imx8mm/imx8mn chips to support wol,
I plan to submit another dts patch after the patch set is accepted.
If you think add the dts patch appending to the patch set, I will add it in v2.
> It currently only modifies the dts files that are already supported by
> hardcoded values in the driver.
>
> As to not knowing which instance it shouldn't matter.
> The base dtsi can declare both/all ethernet interfaces with the appropriate
> GPR bits.
> Both set to status = "disabled".
>
> Then the board specific dts file sets status="okay" and activates wol by adding
> "
> "fsl,magic-packet" if the hardaware supports it (because that depends on
> things beyond the SoC, like how the ethernet PHY is clocked and powered.)
>
> Martin
next prev parent reply other threads:[~2020-05-25 2:29 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-20 8:31 [PATCH net 0/4] net: ethernet: fec: move GPR reigster offset and bit into DT fugang.duan
2020-05-20 8:31 ` [PATCH net 1/4] net: ethernet: fec: move GPR register " fugang.duan
2020-05-20 16:54 ` Jakub Kicinski
2020-05-21 2:40 ` [EXT] " Andy Duan
2020-05-23 9:55 ` Fuzzey, Martin
2020-05-25 2:36 ` [EXT] " Andy Duan
2020-05-20 8:31 ` [PATCH net 2/4] dt-bindings: fec: update the gpr property fugang.duan
2020-05-23 10:15 ` Fuzzey, Martin
2020-05-25 3:16 ` [EXT] " Andy Duan
2020-05-20 8:31 ` [PATCH net 3/4] ARM: dts: imx6: update fec gpr property to match new format fugang.duan
2020-05-20 17:03 ` Andrew Lunn
2020-05-21 3:15 ` [EXT] " Andy Duan
2020-05-21 13:07 ` Andrew Lunn
2020-05-22 1:01 ` Andy Duan
2020-05-22 18:02 ` Fuzzey, Martin
2020-05-22 23:50 ` Andrew Lunn
2020-05-25 2:32 ` Andy Duan
2020-05-25 2:29 ` Andy Duan [this message]
2020-05-20 8:31 ` [PATCH net 4/4] ARM: dts: imx6qdl-sabresd: enable fec wake-on-lan fugang.duan
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