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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Apr 2024 23:41:57.7423 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f20bed01-8379-4f37-33db-08dc5e6ece3d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7726 X-BeenThere: nouveau@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Nouveau development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces@lists.freedesktop.org Sender: "Nouveau" - callers will transition to new args in upcoming patches - some macro trickery to avoid temporary renames, will be removed later Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/dispnv50/core.c | 12 ++++++------ drivers/gpu/drm/nouveau/dispnv50/crc.c | 4 ++-- drivers/gpu/drm/nouveau/dispnv50/wndw.c | 8 ++++---- drivers/gpu/drm/nouveau/include/nvif/object.h | 12 ++++++++++-- drivers/gpu/drm/nouveau/nouveau_drm.c | 4 ++-- drivers/gpu/drm/nouveau/nv17_fence.c | 4 ++-- drivers/gpu/drm/nouveau/nv50_fence.c | 4 ++-- drivers/gpu/drm/nouveau/nvif/object.c | 18 ++++++++++++++++-- 8 files changed, 44 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/core.c b/drivers/gpu/drm/nouveau/dispnv50/core.c index 1864f3e3bbc3..a9c3e53ef909 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/core.c +++ b/drivers/gpu/drm/nouveau/dispnv50/core.c @@ -84,24 +84,24 @@ nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore) ret = nvif_object_ctor(&core->chan.base.user, "kmsCoreSyncCtxdma", NV50_DISP_HANDLE_SYNCBUF, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = disp->sync->offset + 0x0000, - .limit = disp->sync->offset + 0x0fff, - }, sizeof(struct nv_dma_v0), + .limit = disp->sync->offset + 0x0fff + }), sizeof(struct nv_dma_v0), &core->sync); if (ret) return ret; ret = nvif_object_ctor(&core->chan.base.user, "kmsCoreVramCtxdma", NV50_DISP_HANDLE_VRAM, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = 0, - .limit = drm->device.info.ram_user - 1, - }, sizeof(struct nv_dma_v0), + .limit = drm->device.info.ram_user - 1 + }), sizeof(struct nv_dma_v0), &core->vram); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/dispnv50/crc.c b/drivers/gpu/drm/nouveau/dispnv50/crc.c index 9c942fbd836d..0864d36a06f2 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/crc.c +++ b/drivers/gpu/drm/nouveau/dispnv50/crc.c @@ -510,13 +510,13 @@ nv50_crc_ctx_init(struct nv50_head *head, struct nvif_mmu *mmu, ret = nvif_object_ctor(&core->chan.base.user, "kmsCrcNtfyCtxDma", NV50_DISP_HANDLE_CRC_CTX(head, idx), NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = ctx->mem.addr, .limit = ctx->mem.addr + ctx->mem.size - 1, - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &ctx->ntfy); if (ret) goto fail_fini; diff --git a/drivers/gpu/drm/nouveau/dispnv50/wndw.c b/drivers/gpu/drm/nouveau/dispnv50/wndw.c index 1dbf0e73b5de..19606755daf5 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/wndw.c +++ b/drivers/gpu/drm/nouveau/dispnv50/wndw.c @@ -707,24 +707,24 @@ nv50_wndw_ctor(struct nv50_wndw *wndw) ret = nvif_object_ctor(&wndw->wndw.base.user, "kmsWndwSyncCtxDma", NV50_DISP_HANDLE_SYNCBUF, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = disp->sync->offset + 0x0000, .limit = disp->sync->offset + 0x0fff, - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &wndw->sync); if (ret) return ret; ret = nvif_object_ctor(&wndw->wndw.base.user, "kmsWndwVramCtxDma", NV50_DISP_HANDLE_VRAM, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = 0, .limit = drm->device.info.ram_user - 1, - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &wndw->vram); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/include/nvif/object.h b/drivers/gpu/drm/nouveau/include/nvif/object.h index 8d205b6af46a..a84cdb423471 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/object.h +++ b/drivers/gpu/drm/nouveau/include/nvif/object.h @@ -28,8 +28,16 @@ nvif_object_constructed(struct nvif_object *object) return object->client != NULL; } -int nvif_object_ctor(struct nvif_object *, const char *name, u32 handle, - s32 oclass, void *, u32, struct nvif_object *); +int nvif_object_ctor_0(struct nvif_object *, const char *name, u32 handle, + s32 oclass, void *, u32, struct nvif_object *); +void nvif_object_ctor_1(struct nvif_object *parent, const char *name, u32 handle, s32 oclass, + struct nvif_object *); + +#define nvif_object_ctor_(A,B,C,D,E,F,G,IMPL,...) IMPL +#define nvif_object_ctor(A...) nvif_object_ctor_(A, nvif_object_ctor_0, \ + nvif_object_ctor__, \ + nvif_object_ctor_1)(A) + void nvif_object_dtor(struct nvif_object *); int nvif_object_ioctl(struct nvif_object *, void *, u32, void **); int nvif_object_sclass_get(struct nvif_object *, struct nvif_sclass **); diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 9caadcdb3c29..9c6df2ba52d5 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -420,12 +420,12 @@ nouveau_accel_gr_init(struct nouveau_drm *drm) ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy", NvNotify0, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = drm->notify->addr, .limit = drm->notify->addr + 31 - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &drm->ntfy); if (ret) { nouveau_accel_gr_fini(drm); diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c index 4415a6de680b..5b4ceac49225 100644 --- a/drivers/gpu/drm/nouveau/nv17_fence.c +++ b/drivers/gpu/drm/nouveau/nv17_fence.c @@ -94,12 +94,12 @@ nv17_fence_context_new(struct nouveau_channel *chan) ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema, NV_DMA_FROM_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = start, .limit = limit, - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &fctx->sema); if (ret) nv10_fence_context_del(chan); diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c index 8b76cb227f55..1d8792fdd89b 100644 --- a/drivers/gpu/drm/nouveau/nv50_fence.c +++ b/drivers/gpu/drm/nouveau/nv50_fence.c @@ -53,12 +53,12 @@ nv50_fence_context_new(struct nouveau_channel *chan) ret = nvif_object_ctor(&chan->user, "fenceCtxDma", NvSema, NV_DMA_IN_MEMORY, - &(struct nv_dma_v0) { + (&(struct nv_dma_v0) { .target = NV_DMA_V0_TARGET_VRAM, .access = NV_DMA_V0_ACCESS_RDWR, .start = start, .limit = limit, - }, sizeof(struct nv_dma_v0), + }), sizeof(struct nv_dma_v0), &fctx->sema); if (ret) nv10_fence_context_del(chan); diff --git a/drivers/gpu/drm/nouveau/nvif/object.c b/drivers/gpu/drm/nouveau/nvif/object.c index 8a2a7bfec2f8..0e8340710c11 100644 --- a/drivers/gpu/drm/nouveau/nvif/object.c +++ b/drivers/gpu/drm/nouveau/nvif/object.c @@ -220,9 +220,23 @@ nvif_object_dtor(struct nvif_object *object) object->client = NULL; } +void +nvif_object_ctor_1(struct nvif_object *parent, const char *name, u32 handle, s32 oclass, + struct nvif_object *object) +{ + object->parent = parent->parent; + object->client = parent->client; + object->name = name ?: "nvifObject"; + object->handle = handle; + object->oclass = oclass; + object->priv = NULL; + object->map.ptr = NULL; + object->map.size = 0; +} + int -nvif_object_ctor(struct nvif_object *parent, const char *name, u32 handle, - s32 oclass, void *data, u32 size, struct nvif_object *object) +nvif_object_ctor_0(struct nvif_object *parent, const char *name, u32 handle, + s32 oclass, void *data, u32 size, struct nvif_object *object) { struct { struct nvif_ioctl_v0 ioctl; -- 2.41.0