From: Bjorn Helgaas <helgaas@kernel.org>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
Marc Zygnier <maz@kernel.org>,
Alex Williamson <alex.williamson@redhat.com>,
Kevin Tian <kevin.tian@intel.com>,
Jason Gunthorpe <jgg@nvidia.com>, Megha Dey <megha.dey@intel.com>,
Ashok Raj <ashok.raj@intel.com>,
linux-pci@vger.kernel.org, Cedric Le Goater <clg@kaod.org>,
xen-devel@lists.xenproject.org, Juergen Gross <jgross@suse.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Niklas Schnelle <schnelle@linux.ibm.com>,
linux-s390@vger.kernel.org, Heiko Carstens <hca@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
Logan Gunthorpe <logang@deltatee.com>,
Jon Mason <jdmason@kudzu.us>, Dave Jiang <dave.jiang@intel.com>,
Allen Hubbe <allenbh@gmail.com>,
linux-ntb@googlegroups.com
Subject: Re: [patch V2 08/31] PCI/MSI: Use msi_add_msi_desc()
Date: Tue, 7 Dec 2021 15:07:20 -0600 [thread overview]
Message-ID: <20211207210720.GA78195@bhelgaas> (raw)
In-Reply-To: <20211206210748.035348646@linutronix.de>
On Mon, Dec 06, 2021 at 11:51:15PM +0100, Thomas Gleixner wrote:
> Simplify the allocation of MSI descriptors by using msi_add_msi_desc()
> which moves the storage handling to core code and prepares for dynamic
> extension of the MSI-X vector space.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> ---
> drivers/pci/msi/msi.c | 122 ++++++++++++++++++++++++--------------------------
> 1 file changed, 59 insertions(+), 63 deletions(-)
>
> --- a/drivers/pci/msi/msi.c
> +++ b/drivers/pci/msi/msi.c
> @@ -340,45 +340,51 @@ void pci_restore_msi_state(struct pci_de
> }
> EXPORT_SYMBOL_GPL(pci_restore_msi_state);
>
> -static struct msi_desc *
> -msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity_desc *masks)
> +static int msi_setup_msi_desc(struct pci_dev *dev, int nvec,
> + struct irq_affinity_desc *masks)
> {
> - struct msi_desc *entry;
> + struct msi_desc desc;
> unsigned long prop;
> u16 control;
> + int ret;
>
> /* MSI Entry Initialization */
> - entry = alloc_msi_entry(&dev->dev, nvec, masks);
> - if (!entry)
> - return NULL;
> + memset(&desc, 0, sizeof(desc));
>
> pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
> /* Lies, damned lies, and MSIs */
> if (dev->dev_flags & PCI_DEV_FLAGS_HAS_MSI_MASKING)
> control |= PCI_MSI_FLAGS_MASKBIT;
> + /* Respect XEN's mask disabling */
> + if (pci_msi_ignore_mask)
> + control &= ~PCI_MSI_FLAGS_MASKBIT;
>
> - entry->pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
> - entry->pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&
> - !!(control & PCI_MSI_FLAGS_MASKBIT);
> - entry->pci.msi_attrib.default_irq = dev->irq;
> - entry->pci.msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
> - entry->pci.msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
> + desc.nvec_used = nvec;
> + desc.pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
> + desc.pci.msi_attrib.can_mask = !!(control & PCI_MSI_FLAGS_MASKBIT);
> + desc.pci.msi_attrib.default_irq = dev->irq;
> + desc.pci.msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
> + desc.pci.msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
> + desc.affinity = masks;
>
> if (control & PCI_MSI_FLAGS_64BIT)
> - entry->pci.mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
> + desc.pci.mask_pos = dev->msi_cap + PCI_MSI_MASK_64;
> else
> - entry->pci.mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
> + desc.pci.mask_pos = dev->msi_cap + PCI_MSI_MASK_32;
>
> /* Save the initial mask status */
> - if (entry->pci.msi_attrib.can_mask)
> - pci_read_config_dword(dev, entry->pci.mask_pos, &entry->pci.msi_mask);
> + if (desc.pci.msi_attrib.can_mask)
> + pci_read_config_dword(dev, desc.pci.mask_pos, &desc.pci.msi_mask);
>
> - prop = MSI_PROP_PCI_MSI;
> - if (entry->pci.msi_attrib.is_64)
> - prop |= MSI_PROP_64BIT;
> - msi_device_set_properties(&dev->dev, prop);
> + ret = msi_add_msi_desc(&dev->dev, &desc);
> + if (!ret) {
> + prop = MSI_PROP_PCI_MSI;
> + if (desc.pci.msi_attrib.is_64)
> + prop |= MSI_PROP_64BIT;
> + msi_device_set_properties(&dev->dev, prop);
> + }
>
> - return entry;
> + return ret;
> }
>
> static int msi_verify_entries(struct pci_dev *dev)
> @@ -423,17 +429,14 @@ static int msi_capability_init(struct pc
> masks = irq_create_affinity_masks(nvec, affd);
>
> msi_lock_descs(&dev->dev);
> - entry = msi_setup_entry(dev, nvec, masks);
> - if (!entry) {
> - ret = -ENOMEM;
> + ret = msi_setup_msi_desc(dev, nvec, masks);
> + if (ret)
> goto unlock;
> - }
>
> /* All MSIs are unmasked by default; mask them all */
> + entry = first_pci_msi_entry(dev);
> pci_msi_mask(entry, msi_multi_mask(entry));
>
> - list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
> -
> /* Configure MSI capability structure */
> ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
> if (ret)
> @@ -482,49 +485,40 @@ static void __iomem *msix_map_region(str
> return ioremap(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
> }
>
> -static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
> - struct msix_entry *entries, int nvec,
> - struct irq_affinity_desc *masks)
> +static int msix_setup_msi_descs(struct pci_dev *dev, void __iomem *base,
> + struct msix_entry *entries, int nvec,
> + struct irq_affinity_desc *masks)
> {
> - int i, vec_count = pci_msix_vec_count(dev);
> + int ret = 0, i, vec_count = pci_msix_vec_count(dev);
> struct irq_affinity_desc *curmsk;
> - struct msi_desc *entry;
> + struct msi_desc desc;
> void __iomem *addr;
>
> - for (i = 0, curmsk = masks; i < nvec; i++) {
> - entry = alloc_msi_entry(&dev->dev, 1, curmsk);
> - if (!entry) {
> - /* No enough memory. Don't try again */
> - return -ENOMEM;
> - }
> -
> - entry->pci.msi_attrib.is_msix = 1;
> - entry->pci.msi_attrib.is_64 = 1;
> -
> - if (entries)
> - entry->msi_index = entries[i].entry;
> - else
> - entry->msi_index = i;
> -
> - entry->pci.msi_attrib.is_virtual = entry->msi_index >= vec_count;
> -
> - entry->pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&
> - !entry->pci.msi_attrib.is_virtual;
> -
> - entry->pci.msi_attrib.default_irq = dev->irq;
> - entry->pci.mask_base = base;
> + memset(&desc, 0, sizeof(desc));
>
> - if (entry->pci.msi_attrib.can_mask) {
> - addr = pci_msix_desc_addr(entry);
> - entry->pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
> + desc.nvec_used = 1;
> + desc.pci.msi_attrib.is_msix = 1;
> + desc.pci.msi_attrib.is_64 = 1;
> + desc.pci.msi_attrib.default_irq = dev->irq;
> + desc.pci.mask_base = base;
> +
> + for (i = 0, curmsk = masks; i < nvec; i++, curmsk++) {
> + desc.msi_index = entries ? entries[i].entry : i;
> + desc.affinity = masks ? curmsk : NULL;
> + desc.pci.msi_attrib.is_virtual = desc.msi_index >= vec_count;
> + desc.pci.msi_attrib.can_mask = !pci_msi_ignore_mask &&
> + !desc.pci.msi_attrib.is_virtual;
> +
> + if (!desc.pci.msi_attrib.can_mask) {
> + addr = pci_msix_desc_addr(&desc);
> + desc.pci.msix_ctrl = readl(addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
> }
>
> - list_add_tail(&entry->list, dev_to_msi_list(&dev->dev));
> - if (masks)
> - curmsk++;
> + ret = msi_add_msi_desc(&dev->dev, &desc);
> + if (ret)
> + break;
> }
> - msi_device_set_properties(&dev->dev, MSI_PROP_PCI_MSIX | MSI_PROP_64BIT);
> - return 0;
> + return ret;
> }
>
> static void msix_update_entries(struct pci_dev *dev, struct msix_entry *entries)
> @@ -562,10 +556,12 @@ static int msix_setup_interrupts(struct
> masks = irq_create_affinity_masks(nvec, affd);
>
> msi_lock_descs(&dev->dev);
> - ret = msix_setup_entries(dev, base, entries, nvec, masks);
> + ret = msix_setup_msi_descs(dev, base, entries, nvec, masks);
> if (ret)
> goto out_free;
>
> + msi_device_set_properties(&dev->dev, MSI_PROP_PCI_MSIX | MSI_PROP_64BIT);
> +
> ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
> if (ret)
> goto out_free;
>
next prev parent reply other threads:[~2021-12-07 21:07 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-06 22:51 [patch V2 00/31] genirq/msi, PCI/MSI: Spring cleaning - Part 3 Thomas Gleixner
2021-12-06 22:51 ` [patch V2 01/31] genirq/msi: Move descriptor list to struct msi_device_data Thomas Gleixner
2021-12-06 22:51 ` [patch V2 02/31] genirq/msi: Add mutex for MSI list protection Thomas Gleixner
2021-12-09 0:47 ` Jason Gunthorpe
2021-12-09 20:07 ` Thomas Gleixner
2021-12-06 22:51 ` [patch V2 03/31] genirq/msi: Provide msi_domain_alloc/free_irqs_descs_locked() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 04/31] genirq/msi: Provide a set of advanced MSI accessors and iterators Thomas Gleixner
2021-12-06 22:51 ` [patch V2 05/31] genirq/msi: Provide msi_alloc_msi_desc() and a simple allocator Thomas Gleixner
2021-12-06 22:51 ` [patch V2 06/31] genirq/msi: Provide domain flags to allocate/free MSI descriptors automatically Thomas Gleixner
2021-12-06 22:51 ` [patch V2 07/31] PCI/MSI: Protect MSI operations Thomas Gleixner
2021-12-07 21:06 ` Bjorn Helgaas
2021-12-06 22:51 ` [patch V2 08/31] PCI/MSI: Use msi_add_msi_desc() Thomas Gleixner
2021-12-07 21:07 ` Bjorn Helgaas [this message]
2021-12-06 22:51 ` [patch V2 09/31] PCI/MSI: Let core code free MSI descriptors Thomas Gleixner
2021-12-07 21:07 ` Bjorn Helgaas
2021-12-06 22:51 ` [patch V2 10/31] PCI/MSI: Use msi_on_each_desc() Thomas Gleixner
2021-12-07 21:07 ` Bjorn Helgaas
2021-12-06 22:51 ` [patch V2 11/31] x86/pci/xen: Use msi_for_each_desc() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 12/31] xen/pcifront: Rework MSI handling Thomas Gleixner
2021-12-06 22:51 ` [patch V2 13/31] s390/pci: Rework MSI descriptor walk Thomas Gleixner
2021-12-06 22:51 ` [patch V2 14/31] powerpc/4xx/hsta: Rework MSI handling Thomas Gleixner
2021-12-06 22:51 ` [patch V2 15/31] powerpc/cell/axon_msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 16/31] powerpc/pasemi/msi: Convert to msi_on_each_dec() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 17/31] powerpc/fsl_msi: Use msi_for_each_desc() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 18/31] powerpc/mpic_u3msi: Use msi_for_each-desc() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 19/31] PCI: hv: Rework MSI handling Thomas Gleixner
2021-12-07 21:08 ` Bjorn Helgaas
2021-12-06 22:51 ` [patch V2 20/31] NTB/msi: Convert to msi_on_each_desc() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 21/31] soc: ti: ti_sci_inta_msi: Rework MSI descriptor allocation Thomas Gleixner
2021-12-15 20:50 ` Thomas Gleixner
2021-12-06 22:51 ` [patch V2 22/31] soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs() Thomas Gleixner
2021-12-06 22:51 ` [patch V2 23/31] bus: fsl-mc-msi: Simplify MSI descriptor handling Thomas Gleixner
2021-12-06 22:51 ` [patch V2 24/31] platform-msi: Let core code handle MSI descriptors Thomas Gleixner
2021-12-06 22:51 ` [patch V2 25/31] platform-msi: Simplify platform device MSI code Thomas Gleixner
2021-12-06 22:51 ` [patch V2 26/31] genirq/msi: Make interrupt allocation less convoluted Thomas Gleixner
2021-12-06 22:51 ` [patch V2 27/31] genirq/msi: Convert to new functions Thomas Gleixner
2021-12-06 22:51 ` [patch V2 28/31] genirq/msi: Mop up old interfaces Thomas Gleixner
2021-12-06 22:51 ` [patch V2 29/31] genirq/msi: Add abuse prevention comment to msi header Thomas Gleixner
2021-12-07 8:21 ` Greg Kroah-Hartman
2021-12-07 12:46 ` Thomas Gleixner
2021-12-06 22:51 ` [patch V2 30/31] genirq/msi: Simplify sysfs handling Thomas Gleixner
2022-01-10 18:12 ` [patch] genirq/msi: Populate sysfs entry only once Thomas Gleixner
2022-01-10 18:15 ` Borislav Petkov
2022-01-11 8:57 ` Greg Kroah-Hartman
2022-01-11 9:02 ` Cédric Le Goater
2022-01-12 0:05 ` Kunihiko Hayashi
2022-01-18 23:59 ` Thomas Gleixner
2022-01-19 8:45 ` Kunihiko Hayashi
2021-12-06 22:51 ` [patch V2 31/31] genirq/msi: Convert storage to xarray Thomas Gleixner
2021-12-09 1:01 ` [patch V2 00/31] genirq/msi, PCI/MSI: Spring cleaning - Part 3 Jason Gunthorpe
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