From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev
Cc: vishal.l.verma@intel.com, alison.schofield@intel.com, caoqq@fujitsu.com
Subject: [NDCTL PATCH v2 1/2] cxl: Save the number of decoders committed to a port
Date: Tue, 28 Nov 2023 13:43:51 -0700 [thread overview]
Message-ID: <170120423159.2725915.14670830315829916850.stgit@djiang5-mobl3> (raw)
Save the number of decoders committed to a port exposed by the kernel to the
libcxl cxl_port context. The attribute is helpful for determing if a region is
active. Add libcxl API to retrieve the number of decoders committed.
Add the decoders_committed attribute to the port for cxl list command.
Link: https://lore.kernel.org/linux-cxl/169645700414.623072.3893376765415910289.stgit@djiang5-mobl3/T/#t
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
---
v2:
- Rebase against latest pending branch
---
Documentation/cxl/lib/libcxl.txt | 1 +
cxl/json.c | 4 ++++
cxl/lib/libcxl.c | 9 +++++++++
cxl/lib/libcxl.sym | 1 +
cxl/lib/private.h | 1 +
cxl/libcxl.h | 1 +
6 files changed, 17 insertions(+)
diff --git a/Documentation/cxl/lib/libcxl.txt b/Documentation/cxl/lib/libcxl.txt
index bcb89288afaf..93c32b54f19e 100644
--- a/Documentation/cxl/lib/libcxl.txt
+++ b/Documentation/cxl/lib/libcxl.txt
@@ -295,6 +295,7 @@ bool cxl_port_is_endpoint(struct cxl_port *port);
int cxl_port_get_depth(struct cxl_port *port);
bool cxl_port_hosts_memdev(struct cxl_port *port, struct cxl_memdev *memdev);
int cxl_port_get_nr_dports(struct cxl_port *port);
+struct cxl_port *cxl_port_decoders_committed(struct cxl_port *port);
----
The port type is communicated via cxl_port_is_<type>(). An 'enabled' port
is one that has succeeded in discovering the CXL component registers in
diff --git a/cxl/json.c b/cxl/json.c
index 6fb17582a1cb..477e35a5157a 100644
--- a/cxl/json.c
+++ b/cxl/json.c
@@ -1331,6 +1331,10 @@ static struct json_object *__util_cxl_port_to_json(struct cxl_port *port,
json_object_object_add(jport, "state", jobj);
}
+ jobj = json_object_new_int(cxl_port_decoders_committed(port));
+ if (jobj)
+ json_object_object_add(jport, "decoders_committed", jobj);
+
json_object_set_userdata(jport, port, NULL);
return jport;
}
diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c
index bdec2959508b..c1a127f66a1d 100644
--- a/cxl/lib/libcxl.c
+++ b/cxl/lib/libcxl.c
@@ -1880,6 +1880,10 @@ static int cxl_port_init(struct cxl_port *port, struct cxl_port *parent_port,
if (sysfs_read_attr(ctx, path, buf) == 0)
port->module = util_modalias_to_module(ctx, buf);
+ sprintf(path, "%s/decoders_committed", cxlport_base);
+ if (sysfs_read_attr(ctx, path, buf) == 0)
+ port->decoders_committed = strtoul(buf, NULL, 0);
+
free(path);
return 0;
err:
@@ -3121,6 +3125,11 @@ cxl_port_get_dport_by_memdev(struct cxl_port *port, struct cxl_memdev *memdev)
return NULL;
}
+CXL_EXPORT int cxl_port_decoders_committed(struct cxl_port *port)
+{
+ return port->decoders_committed;
+}
+
static void *add_cxl_bus(void *parent, int id, const char *cxlbus_base)
{
const char *devname = devpath_to_devname(cxlbus_base);
diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym
index 42f523fda16d..16eca09b3d8b 100644
--- a/cxl/lib/libcxl.sym
+++ b/cxl/lib/libcxl.sym
@@ -277,4 +277,5 @@ global:
cxl_cmd_new_set_alert_config;
cxl_memdev_trigger_poison_list;
cxl_region_trigger_poison_list;
+ cxl_port_decoders_committed;
} LIBCXL_6;
diff --git a/cxl/lib/private.h b/cxl/lib/private.h
index b26a8629e047..30c898940dec 100644
--- a/cxl/lib/private.h
+++ b/cxl/lib/private.h
@@ -87,6 +87,7 @@ struct cxl_port {
int dports_init;
int nr_dports;
int depth;
+ int decoders_committed;
struct cxl_ctx *ctx;
struct cxl_bus *bus;
enum cxl_port_type type;
diff --git a/cxl/libcxl.h b/cxl/libcxl.h
index 1154f4ce34d1..f7db400f574a 100644
--- a/cxl/libcxl.h
+++ b/cxl/libcxl.h
@@ -145,6 +145,7 @@ bool cxl_port_hosts_memdev(struct cxl_port *port, struct cxl_memdev *memdev);
int cxl_port_get_nr_dports(struct cxl_port *port);
int cxl_port_disable_invalidate(struct cxl_port *port);
int cxl_port_enable(struct cxl_port *port);
+int cxl_port_decoders_committed(struct cxl_port *port);
struct cxl_port *cxl_port_get_next_all(struct cxl_port *port,
const struct cxl_port *top);
next reply other threads:[~2023-11-28 20:44 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 20:43 Dave Jiang [this message]
2023-11-28 20:43 ` [NDCTL PATCH v2 2/2] cxl: Add check for regions before disabling memdev Dave Jiang
2023-11-30 1:41 ` Cao, Quanquan/曹 全全
2023-11-30 8:29 ` Cao, Quanquan/曹 全全
2023-11-30 16:07 ` Dave Jiang
2023-11-30 21:51 ` [NDCTL PATCH v3 " Dave Jiang
2024-04-17 6:46 ` Yao Xingtao
2024-04-17 18:14 ` Verma, Vishal L
2024-04-22 7:26 ` Re: Xingtao Yao (Fujitsu)
2024-04-25 5:30 ` [NDCTL PATCH v3 2/2] cxl: Add check for regions before disabling memdev Zhijian Li (Fujitsu)
2024-04-25 16:52 ` Alison Schofield
2024-04-26 1:57 ` Zhijian Li (Fujitsu)
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