From: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
To: <robh+dt@kernel.org>, <joel@jms.id.au>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <adrian.hunter@intel.com>,
<linux-aspeed@lists.ozlabs.org>, <openbmc@lists.ozlabs.org>,
<linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<andrew@aj.id.au>
Cc: BMC-SW@aspeedtech.com, steven_lee@aspeedtech.com
Subject: [PATCH 04/10] mmc: Add invert flag for clock phase signedness
Date: Wed, 22 Sep 2021 18:31:10 +0800 [thread overview]
Message-ID: <20210922103116.30652-5-chin-ting_kuo@aspeedtech.com> (raw)
In-Reply-To: <20210922103116.30652-1-chin-ting_kuo@aspeedtech.com>
The clock phase degree may be between -360 to 360.
If the data signal is leading to the clock, the signedness
of clock phase is postive, otherwise, the signedness
is negative.
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
---
drivers/mmc/core/host.c | 10 ++++++----
include/linux/mmc/host.h | 2 ++
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index d4683b1d263f..c2de7cbc7838 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -214,14 +214,16 @@ static void mmc_retune_timer(struct timer_list *t)
static void mmc_of_parse_timing_phase(struct device *dev, const char *prop,
struct mmc_clk_phase *phase)
{
- int degrees[2] = {0};
+ int degrees[4] = {0};
int rc;
- rc = device_property_read_u32_array(dev, prop, degrees, 2);
+ rc = device_property_read_u32_array(dev, prop, degrees, 4);
phase->valid = !rc;
if (phase->valid) {
- phase->in_deg = degrees[0];
- phase->out_deg = degrees[1];
+ phase->inv_in_deg = degrees[0] ? true : false;
+ phase->in_deg = degrees[1];
+ phase->inv_out_deg = degrees[2] ? true : false;
+ phase->out_deg = degrees[3];
}
}
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 0c0c9a0fdf57..3c13010683e0 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -82,7 +82,9 @@ struct mmc_ios {
struct mmc_clk_phase {
bool valid;
+ bool inv_in_deg;
u16 in_deg;
+ bool inv_out_deg;
u16 out_deg;
};
--
2.17.1
next prev parent reply other threads:[~2021-09-22 11:06 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-22 10:31 [PATCH 00/10] ASPEED SD/eMMC controller clock configuration Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 01/10] clk: aspeed: ast2600: Porting sdhci clock source Chin-Ting Kuo
2021-09-23 0:02 ` Joel Stanley
2021-09-23 5:31 ` Chin-Ting Kuo
2021-10-26 6:10 ` Paul Menzel
2021-11-26 2:27 ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 02/10] sdhci: aspeed: Add SDR50 support Chin-Ting Kuo
2021-10-26 0:31 ` Andrew Jeffery
2021-11-06 10:01 ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 03/10] dts: aspeed: ast2600: Support SDR50 for SD device Chin-Ting Kuo
2021-10-26 0:42 ` Andrew Jeffery
2021-11-06 10:01 ` Chin-Ting Kuo
2021-09-22 10:31 ` Chin-Ting Kuo [this message]
2021-10-26 0:52 ` [PATCH 04/10] mmc: Add invert flag for clock phase signedness Andrew Jeffery
2021-11-06 10:02 ` Chin-Ting Kuo
2021-11-08 0:21 ` Andrew Jeffery
2021-09-22 10:31 ` [PATCH 05/10] mmc: aspeed: Adjust delay taps calculation method Chin-Ting Kuo
2021-10-26 3:10 ` Andrew Jeffery
2021-11-06 10:05 ` Chin-Ting Kuo
2021-11-07 23:42 ` Andrew Jeffery
2021-09-22 10:31 ` [PATCH 06/10] arm: dts: aspeed: Change eMMC device compatible Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 07/10] arm: dts: aspeed: Adjust clock phase parameter Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 08/10] arm: dts: ibm: " Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 09/10] dt-bindings: mmc: aspeed: Add max-tap-delay property Chin-Ting Kuo
2021-09-27 18:40 ` Rob Herring
2021-09-28 2:50 ` Chin-Ting Kuo
2021-09-22 10:31 ` [PATCH 10/10] dt-bindings: mmc: aspeed: Add a new compatible string Chin-Ting Kuo
2021-09-27 18:59 ` Rob Herring
2021-09-28 2:50 ` Chin-Ting Kuo
2021-09-28 22:28 ` Rob Herring
2021-09-29 3:03 ` Chin-Ting Kuo
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