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From: Shakeeb B K <shakeebbk@gmail.com>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: openbmc@lists.ozlabs.org
Subject: Re: [ast2500] aspeed-smc fail with MX25L25635F
Date: Thu, 1 Apr 2021 20:52:12 +0530	[thread overview]
Message-ID: <CABYu0Wi=Y2B0WsKqYd9Fin=Weow28ex6YzBPnKuoQq4cB26n6Q@mail.gmail.com> (raw)
In-Reply-To: <b17f2faf-4c50-4b68-bbad-6d91a7661c61@kaod.org>


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Hi Cédric,

The part we are using is *MX25L25635F*
https://www.macronix.com/Lists/Datasheet/Attachments/7414/MX25L25635F,%203V,%20256Mb,%20v1.5.pdf
<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.macronix.com%2FLists%2FDatasheet%2FAttachments%2F7414%2FMX25L25635F%2C%25203V%2C%2520256Mb%2C%2520v1.5.pdf&data=04%7C01%7Cspasha%40nvidia.com%7C4cf89d8779c84d638c6f08d8ef7d0919%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C637522667609971209%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=hYy5Cpi06y4T0DpFb4%2FDeo2nEy5Cn3rf3l%2BEO%2FaPP%2FU%3D&reserved=0>

Attaching the failed boot log - full_boot.log

The patch that fixes the problem - workaround.patch

A patch to override read opcode - 001-Debug.patch
Failing log with post fixup read opcode update - fail_post_fixup.log

Thanks,
Shakeeb

On Thu, Apr 1, 2021 at 4:52 PM Cédric Le Goater <clg@kaod.org> wrote:

> Hi,
>
> On 4/1/21 12:17 PM, Shakeeb B K wrote:
> > Hi All,
> >
> > We figured that the issue here is with part MX25L25635F not supporting
> 4B dual mode opcode - 0x3c. It instead uses 0x3b.
>
> The 4B issue is a long story ... Is is a MX25L25635F or a MX25L25635E ?
>
> Could you give use more info on the board ? the full dmesg would be
> helpful.
>
> I fail to reproduce on the systems I have.
>
> > aspeed-smc enables dual mode by default with SNOR_HWCAPS_READ_1_1_2 in
> the setup,
> > and hence disabling dual mode from  flash_info table in spi-nor is not
> helpful.
> >
> > I see that there is no way to override opcode in spi-nor framework
> either.
> > There are a couple of queries here -
> > 1. Why is SNOR_HWCAPS_READ_1_1_2 enabled by default in aspeed-smc, while
> we could have done with the flash_info table?
> > 2. Can there be an extension in spi-nor to support read opcode override?
> >
> > Any thoughts on what would be the preferred fix?
>
> I think you should add a mx25l25635_post_bfpt_fixups once you have found
> the correct criteria.
>
>
> C.
>
> > Thanks,
> > Shakeeb
> >
> > On Thu, Mar 18, 2021 at 9:32 PM Shakeeb B K <shakeebbk@gmail.com
> <mailto:shakeebbk@gmail.com>> wrote:
> >
> >     Hi All,
> >
> >     We are working with Macronix MX25L25635F, and are not able to get
> spi nor access working from linux(develop-5.10).
> >     u-boot flash drivers work fine - able to verify the flash contents.
> >     But linux aspeed-smc seems to be having issues, with read
> calibration failing all the time
> >     [    1.746960] aspeed-smc 1e620000.spi: Using 50 MHz SPI frequency
> >     [    1.753028] aspeed-smc 1e620000.spi: control register: 000b0641
> >     [    1.758982] aspeed-smc 1e620000.spi: control register changed to:
> 00000600
> >     [    1.765947] aspeed-smc 1e620000.spi: default control register:
> 00000600
> >     [    1.772810] aspeed-smc 1e620000.spi: mx25l25635e (32768 Kbytes)
> >     [    1.778773] aspeed-smc 1e620000.spi: CE0 window [ 0x20000000 -
> 0x22000000 ] 32MB
> >     [    1.786286] aspeed-smc 1e620000.spi: CE1 window [ 0x22000000 -
> 0x2a000000 ] 128MB
> >     [    1.793873] aspeed-smc 1e620000.spi: write control register:
> 00120602
> >     [    1.800341] aspeed-smc 1e620000.spi: read control register:
> 203c0641
> >     [    1.806791] aspeed-smc 1e620000.spi: AHB frequency: 198 MHz
> >     [    1.823440] aspeed-smc 1e620000.spi: Trying HCLK/5 [203c0d41] ...
> >     [    1.831524] aspeed-smc 1e620000.spi:   * [00080000] 0 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.841333] aspeed-smc 1e620000.spi:   * [00000000] 0 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.851152] aspeed-smc 1e620000.spi:   * [00090000] 1 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.860969] aspeed-smc 1e620000.spi:   * [00010000] 1 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.870746] aspeed-smc 1e620000.spi:   * [000a0000] 2 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.880579] aspeed-smc 1e620000.spi:   * [00020000] 2 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.890435] aspeed-smc 1e620000.spi:   * [000b0000] 3 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.900301] aspeed-smc 1e620000.spi:   * [00030000] 3 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.910182] aspeed-smc 1e620000.spi:   * [000c0000] 4 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.920060] aspeed-smc 1e620000.spi:   * [00040000] 4 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.929964] aspeed-smc 1e620000.spi:   * [000d0000] 5 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.939869] aspeed-smc 1e620000.spi:   * [00050000] 5 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.947796] aspeed-smc 1e620000.spi: Trying HCLK/4 [203c0641] ...
> >     [    1.955529] aspeed-smc 1e620000.spi:   * [00008000] 0 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.964998] aspeed-smc 1e620000.spi:   * [00000000] 0 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.974483] aspeed-smc 1e620000.spi:   * [00009000] 1 HCLK delay,
> 4ns DI delay : FAIL
> >     [    1.983967] aspeed-smc 1e620000.spi:   * [00001000] 1 HCLK delay,
> 0ns DI delay : FAIL
> >     [    1.993475] aspeed-smc 1e620000.spi:   * [0000a000] 2 HCLK delay,
> 4ns DI delay : FAIL
> >     [    2.002986] aspeed-smc 1e620000.spi:   * [00002000] 2 HCLK delay,
> 0ns DI delay : FAIL
> >     [    2.012508] aspeed-smc 1e620000.spi:   * [0000b000] 3 HCLK delay,
> 4ns DI delay : FAIL
> >     [    2.022035] aspeed-smc 1e620000.spi:   * [00003000] 3 HCLK delay,
> 0ns DI delay : FAIL
> >     [    2.031581] aspeed-smc 1e620000.spi:   * [0000c000] 4 HCLK delay,
> 4ns DI delay : FAIL
> >     [    2.041131] aspeed-smc 1e620000.spi:   * [00004000] 4 HCLK delay,
> 0ns DI delay : FAIL
> >     [    2.050639] aspeed-smc 1e620000.spi:   * [0000d000] 5 HCLK delay,
> 4ns DI delay : FAIL
> >     [    2.060203] aspeed-smc 1e620000.spi:   * [00005000] 5 HCLK delay,
> 0ns DI delay : FAIL
> >     [    2.068116] aspeed-smc 1e620000.spi: No good frequency, using
> dumb slow
> >     [    2.077460] 5 fixed-partitions partitions found on MTD device bmc
> >     [    2.083721] Creating 5 MTD partitions on "bmc":
> >     [    2.088289] 0x000000000000-0x000000060000 : "u-boot"
> >     [    2.096067] 0x000000060000-0x000000080000 : "u-boot-env"
> >     [    2.104054] 0x000000080000-0x0000004c0000 : "kernel"
> >     [    2.111699] 0x0000004c0000-0x000001c00000 : "rofs"
> >     [    2.119091] 0x000001c00000-0x000002000000 : "rwfs"
> >     ...
> >     rofs = mtd4 squashfs rwfs = mtd5 jffs2
> >     mount: mounting /dev/mtdblock4 on run/initramfs/ro failed: Invalid
> argument
> >     [    3.654132] jffs2: Node totlen on flash (0xffffffff) != totlen
> from node ref (0x0000000c)
> >     [    3.685843] jffs2: Node totlen on flash (0xffffffff) != totlen
> from node ref (0x00000044)
> >     [    3.694229] overlayfs: upper fs does not support tmpfile.
> >     [    3.699946] jffs2: Node totlen on flash (0xffffffff) != totlen
> from node ref (0x0000002c)
> >     [    3.708309] jffs2: Node totlen on flash (0xffffffff) != totlen
> from node ref (0x00000044)
> >     [    3.716672] overlayfs: upper fs does not support RENAME_WHITEOUT.
> >     [    3.722885] overlayfs: upper fs does not support xattr, falling
> back to index=off and metacopy=off.
> >     chroot: can't execute '/bin/sh': No such file or directory
> >
> >     Unable to confirm /sbin/init is an executable non-empty file
> >     in merged file system mounted at /root.
> >
> >     Found a related discussion on
> https://lists.ozlabs.org/pipermail/openbmc/2019-April/015925.html <
> https://lists.ozlabs.org/pipermail/openbmc/2019-April/015925.html>,
> >     but the workaround mentioned there - to drop read calibration
> with /optimize_read=false /didn't help.
> >     FYI - Able to boot the same image from tftpboot and qemu.
> >
> >     Has anyone come across similar issue or any suggestions to try out?
> >
> >     Thanks,
> >     Shakeeb
> >
>
>

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[-- Attachment #2: 0001-Debug.patch --]
[-- Type: application/octet-stream, Size: 3431 bytes --]

diff --git a/drivers/mtd/spi-nor/controllers/aspeed-smc.c b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
index e5f2108956b5..bb7cc41355e6 100644
--- a/drivers/mtd/spi-nor/controllers/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/controllers/aspeed-smc.c
@@ -1262,10 +1262,6 @@ static int aspeed_smc_setup_flash(struct aspeed_smc_controller *controller,
 			break;
 		}
 
-		if (of_property_read_bool(child, "mx25l25635f-disable-dual-mode")) {
-			hwcaps.mask &= ~SNOR_HWCAPS_READ_1_1_2;
-		}
-
 		if (cs >= info->nce) {
 			dev_err(dev, "Chip select %d out of range.\n",
 				cs);
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 06e1bf01fd92..a375d3ce1da3 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1029,18 +1029,20 @@ static u8 spi_nor_convert_opcode(u8 opcode, const u8 table[][2], size_t size)
 u8 spi_nor_convert_3to4_read(u8 opcode)
 {
 	static const u8 spi_nor_3to4_read[][2] = {
-		{ SPINOR_OP_READ,	SPINOR_OP_READ_4B },
-		{ SPINOR_OP_READ_FAST,	SPINOR_OP_READ_FAST_4B },
-		{ SPINOR_OP_READ_1_1_2,	SPINOR_OP_READ_1_1_2_4B },
-		{ SPINOR_OP_READ_1_2_2,	SPINOR_OP_READ_1_2_2_4B },
-		{ SPINOR_OP_READ_1_1_4,	SPINOR_OP_READ_1_1_4_4B },
-		{ SPINOR_OP_READ_1_4_4,	SPINOR_OP_READ_1_4_4_4B },
-		{ SPINOR_OP_READ_1_1_8,	SPINOR_OP_READ_1_1_8_4B },
-		{ SPINOR_OP_READ_1_8_8,	SPINOR_OP_READ_1_8_8_4B },
-
-		{ SPINOR_OP_READ_1_1_1_DTR,	SPINOR_OP_READ_1_1_1_DTR_4B },
-		{ SPINOR_OP_READ_1_2_2_DTR,	SPINOR_OP_READ_1_2_2_DTR_4B },
-		{ SPINOR_OP_READ_1_4_4_DTR,	SPINOR_OP_READ_1_4_4_DTR_4B },
+		{ SPINOR_OP_READ, SPINOR_OP_READ_4B },
+		{ SPINOR_OP_READ_FAST, SPINOR_OP_READ_FAST_4B },
+		{ SPINOR_OP_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B },
+		{ SPINOR_OP_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B },
+		{ SPINOR_OP_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B },
+		{ SPINOR_OP_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B },
+		{ SPINOR_OP_READ_1_1_8, SPINOR_OP_READ_1_1_8_4B },
+		{ SPINOR_OP_READ_1_8_8, SPINOR_OP_READ_1_8_8_4B },
+
+		{ SPINOR_OP_READ_1_1_1_DTR, SPINOR_OP_READ_1_1_1_DTR_4B },
+		{ SPINOR_OP_READ_1_2_2_DTR, SPINOR_OP_READ_1_2_2_DTR_4B },
+		{ SPINOR_OP_READ_1_4_4_DTR, SPINOR_OP_READ_1_4_4_DTR_4B },
+
+		{ SPINOR_OP_READ_1_1_2_MX, SPINOR_OP_READ_1_1_2}
 	};
 
 	return spi_nor_convert_opcode(opcode, spi_nor_3to4_read,
diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index ee376edbfa2c..d5c9a90ab36a 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -23,8 +23,11 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
 	 * seems that the F version advertises support for Fast Read 4-4-4 in
 	 * its BFPT table.
 	 */
-	if (bfpt->dwords[BFPT_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4)
+	if (bfpt->dwords[BFPT_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4) {
 		nor->flags |= SNOR_F_4B_OPCODES;
+		dev_info(nor->dev, "DEBUG: Applying mx25l25635_post_bfpt_fixups\n");
+		nor->read_opcode = SPINOR_OP_READ_1_1_2_MX;
+	}
 
 	return 0;
 }
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 60bac2c0ec45..d998433df7af 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -79,6 +79,8 @@
 #define SPINOR_OP_READ_1_2_2_DTR_4B	0xbe
 #define SPINOR_OP_READ_1_4_4_DTR_4B	0xee
 
+#define SPINOR_OP_READ_1_1_2_MX     0xef
+
 /* Used for SST flashes only. */
 #define SPINOR_OP_BP		0x02	/* Byte program */
 #define SPINOR_OP_AAI_WP	0xad	/* Auto address increment word program */
-- 
2.29.2


[-- Attachment #3: workaround.patch --]
[-- Type: application/octet-stream, Size: 675 bytes --]

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index ee376edbfa2c..2d7d90f50d80 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -23,8 +23,11 @@ mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
 	 * seems that the F version advertises support for Fast Read 4-4-4 in
 	 * its BFPT table.
 	 */
-	if (bfpt->dwords[BFPT_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4)
+	if (bfpt->dwords[BFPT_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4) {
 		nor->flags |= SNOR_F_4B_OPCODES;
+		dev_info(nor->dev, "DEBUG: Applying mx25l25635_post_bfpt_fixups\n");
+		nor->params->hwcaps.mask &= ~SNOR_HWCAPS_READ_1_1_2;
+	}
 
 	return 0;
 }

[-- Attachment #4: full_boot.log --]
[-- Type: application/octet-stream, Size: 37469 bytes --]

[-- Attachment #5: fail_post_fixup.log --]
[-- Type: application/octet-stream, Size: 14276 bytes --]

  reply	other threads:[~2021-04-01 15:26 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-18 16:02 [ast2500] aspeed-smc fail with MX25L25635F Shakeeb B K
2021-04-01 10:17 ` Shakeeb B K
2021-04-01 11:22   ` Cédric Le Goater
2021-04-01 15:22     ` Shakeeb B K [this message]
2021-04-02  7:15       ` Cédric Le Goater
2021-04-05  6:08         ` Shakeeb B K
2021-04-06  8:51           ` Cédric Le Goater

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