From: Joel Stanley <joel@jms.id.au>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
johnny_huang@aspeedtech.com,
linux-aspeed <linux-aspeed@lists.ozlabs.org>,
OpenBMC Maillist <openbmc@lists.ozlabs.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux
Date: Thu, 10 Sep 2020 01:52:04 +0000 [thread overview]
Message-ID: <CACPK8XeOf1H2Cdo434DsAjDNGrohip_MZTSMMOh1nhspz2y7dA@mail.gmail.com> (raw)
In-Reply-To: <20200909114312.2863675-2-andrew@aj.id.au>
On Wed, 9 Sep 2020 at 11:43, Andrew Jeffery <andrew@aj.id.au> wrote:
>
> When displaying which pinconf register and field is being touched, format the
> field mask so that it's consistent with the way the pinmux portion
> formats the mask.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> index 53f3f8aec695..d8972911d505 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
> @@ -539,9 +539,9 @@ int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
> if (rc < 0)
> return rc;
>
> - pr_debug("%s: Set SCU%02X[%lu]=%d for param %d(=%d) on pin %d\n",
> - __func__, pconf->reg, __ffs(pconf->mask),
> - pmap->val, param, arg, offset);
> + pr_debug("%s: Set SCU%02X[0x%08X]=%d for param %d(=%d) on pin %d\n",
The pr_debug in pinmux-aspeed.c prints val as 0x%X. Did you want to do
that here?
> + __func__, pconf->reg, pconf->mask,
> + val, param, arg, offset);
> }
>
> return 0;
> --
> 2.25.1
>
next prev parent reply other threads:[~2020-09-10 1:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-09 11:43 [PATCH 0/3] pinctrl: aspeed: AST2600 pinconf fixes Andrew Jeffery
2020-09-09 11:43 ` [PATCH 1/3] pinctrl: aspeed: Format pinconf debug consistent with pinmux Andrew Jeffery
2020-09-10 1:52 ` Joel Stanley [this message]
2020-09-10 2:15 ` Andrew Jeffery
2020-09-09 11:43 ` [PATCH 2/3] pinctrl: aspeed: Use the right pinconf mask Andrew Jeffery
2020-09-10 1:52 ` Joel Stanley
2020-09-09 11:43 ` [PATCH 3/3] pinctrl: aspeed-g6: Add bias controls for 1.8V GPIO banks Andrew Jeffery
2020-09-10 2:02 ` Joel Stanley
2020-09-29 12:25 ` [PATCH 0/3] pinctrl: aspeed: AST2600 pinconf fixes Linus Walleij
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