From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
To: agross@kernel.org
Cc: bjorn.andersson@linaro.org, mturquette@baylibre.com,
robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, phone-devel@vger.kernel.org,
konrad.dybcio@somainline.org, marijn.suijten@somainline.org,
martin.botka@somainline.org,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@somainline.org>
Subject: [PATCH v2 7/9] clk: qcom: gdsc: Implement NO_RET_PERIPH flag
Date: Wed, 13 Jan 2021 19:38:15 +0100 [thread overview]
Message-ID: <20210113183817.447866-8-angelogioacchino.delregno@somainline.org> (raw)
In-Reply-To: <20210113183817.447866-1-angelogioacchino.delregno@somainline.org>
In some rare occasions, we want to only set the RETAIN_MEM bit, but
not the RETAIN_PERIPH one: this is seen on at least SDM630/636/660's
GPU-GX GDSC, where unsetting and setting back the RETAIN_PERIPH bit
will generate chaos and panics during GPU suspend time (mainly, the
chaos is unaligned access).
For this reason, introduce a new NO_RET_PERIPH flag to the GDSC
driver to address this corner case.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
---
drivers/clk/qcom/gdsc.c | 10 ++++++++--
drivers/clk/qcom/gdsc.h | 3 ++-
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index af26e0695b86..51ed640e527b 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -183,7 +183,10 @@ static inline int gdsc_assert_reset(struct gdsc *sc)
static inline void gdsc_force_mem_on(struct gdsc *sc)
{
int i;
- u32 mask = RETAIN_MEM | RETAIN_PERIPH;
+ u32 mask = RETAIN_MEM;
+
+ if (!(sc->flags & NO_RET_PERIPH))
+ mask |= RETAIN_PERIPH;
for (i = 0; i < sc->cxc_count; i++)
regmap_update_bits(sc->regmap, sc->cxcs[i], mask, mask);
@@ -192,7 +195,10 @@ static inline void gdsc_force_mem_on(struct gdsc *sc)
static inline void gdsc_clear_mem_on(struct gdsc *sc)
{
int i;
- u32 mask = RETAIN_MEM | RETAIN_PERIPH;
+ u32 mask = RETAIN_MEM;
+
+ if (!(sc->flags & NO_RET_PERIPH))
+ mask |= RETAIN_PERIPH;
for (i = 0; i < sc->cxc_count; i++)
regmap_update_bits(sc->regmap, sc->cxcs[i], mask, 0);
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index bd537438c793..5bb396b344d1 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -42,7 +42,7 @@ struct gdsc {
#define PWRSTS_ON BIT(2)
#define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
#define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
- const u8 flags;
+ const u16 flags;
#define VOTABLE BIT(0)
#define CLAMP_IO BIT(1)
#define HW_CTRL BIT(2)
@@ -51,6 +51,7 @@ struct gdsc {
#define POLL_CFG_GDSCR BIT(5)
#define ALWAYS_ON BIT(6)
#define RETAIN_FF_ENABLE BIT(7)
+#define NO_RET_PERIPH BIT(8)
struct reset_controller_dev *rcdev;
unsigned int *resets;
unsigned int reset_count;
--
2.29.2
next prev parent reply other threads:[~2021-01-13 18:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-13 18:38 [PATCH v2 0/9] SDM630/660 GCC/MMCC/GPUCC clock controllers AngeloGioacchino Del Regno
2021-01-13 18:38 ` [PATCH v2 1/9] clk: qcom: gcc-sdm660: Mark MMSS NoC CFG AHB clock as critical AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 2/9] clk: qcom: gcc-sdm660: Mark GPU " AngeloGioacchino Del Regno
2021-02-11 20:18 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 3/9] clk: qcom: Add SDM660 Multimedia Clock Controller (MMCC) driver AngeloGioacchino Del Regno
2021-01-26 13:39 ` Stanimir Varbanov
2021-01-26 14:11 ` AngeloGioacchino Del Regno
2021-02-08 13:51 ` Konrad Dybcio
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 4/9] dt-bindings: clock: Add support for the SDM630 and SDM660 mmcc AngeloGioacchino Del Regno
2021-01-25 20:49 ` Rob Herring
2021-02-11 20:19 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 5/9] clk: qcom: rcg2: Stop hardcoding gfx3d pingpong parent numbers AngeloGioacchino Del Regno
2021-02-11 20:19 ` Stephen Boyd
2021-02-11 21:46 ` AngeloGioacchino Del Regno
2021-01-13 18:38 ` [PATCH v2 6/9] clk: qcom: mmcc-msm8996: Migrate gfx3d clock to clk_rcg2_gfx3d AngeloGioacchino Del Regno
2021-01-26 14:31 ` Bjorn Andersson
2021-02-11 20:20 ` Stephen Boyd
2021-01-13 18:38 ` AngeloGioacchino Del Regno [this message]
2021-02-11 20:20 ` [PATCH v2 7/9] clk: qcom: gdsc: Implement NO_RET_PERIPH flag Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 8/9] clk: qcom: Add SDM660 GPU Clock Controller (GPUCC) driver AngeloGioacchino Del Regno
2021-02-11 20:21 ` Stephen Boyd
2021-01-13 18:38 ` [PATCH v2 9/9] dt-bindings: clock: Add QCOM SDM630 and SDM660 graphics clock bindings AngeloGioacchino Del Regno
2021-01-25 21:03 ` Rob Herring
2021-02-11 20:21 ` Stephen Boyd
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