Re: [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine

From: "Luca Weiss" <luca.weiss@fairphone.com>
To: "Bjorn Andersson" <andersson@kernel.org>
Cc: "Stephan Gerhold" <stephan@gerhold.net>,
	"Andy Gross" <agross@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	"Thara Gopinath" <thara.gopinath@gmail.com>,
	"Herbert Xu" <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Bhupesh Sharma" <bhupesh.sharma@linaro.org>,
	<~postmarketos/upstreaming@lists.sr.ht>,
	<phone-devel@vger.kernel.org>, <linux-crypto@vger.kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sm6350: Add Crypto Engine
Date: Mon, 19 Feb 2024 11:35:00 +0100	[thread overview]
Message-ID: <CZ8ZLKN072K5.1WRT68QL5IUSZ@fairphone.com> (raw)
In-Reply-To: <pbjbhnj4opt57xswk7jfg2h2wjdv3onmg4ukxn22tsjjsnknxv@m5gy44kkbvvl>

On Fri Feb 16, 2024 at 7:09 PM CET, Bjorn Andersson wrote:
> On Fri, Feb 16, 2024 at 11:46:49AM +0100, Luca Weiss wrote:
> > On Fri Jan 5, 2024 at 5:30 PM CET, Stephan Gerhold wrote:
> > > On Fri, Jan 05, 2024 at 05:15:44PM +0100, Luca Weiss wrote:
> > > > Add crypto engine (CE) and CE BAM related nodes and definitions for this
> > > > SoC.
> > > > 
> > > > For reference:
> > > > 
> > > >   [    2.297419] qcrypto 1dfa000.crypto: Crypto device found, version 5.5.1
> > > > 
> > > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > > > ---
> > > >  arch/arm64/boot/dts/qcom/sm6350.dtsi | 31 +++++++++++++++++++++++++++++++
> > > >  1 file changed, 31 insertions(+)
> > > > 
> > > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > index 8fd6f4d03490..516aadbb16bb 100644
> > > > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
> > > > @@ -1212,6 +1212,37 @@ ufs_mem_phy_lanes: phy@1d87400 {
> > > >  			};
> > > >  		};
> > > >  
> > > > +		cryptobam: dma-controller@1dc4000 {
> > > > +			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > > > +			reg = <0 0x01dc4000 0 0x24000>;
> > > > +			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > > > +			#dma-cells = <1>;
> > > > +			qcom,ee = <0>;
> > > > +			qcom,controlled-remotely;
> > > > +			num-channels = <16>;
> > > > +			qcom,num-ees = <4>;
> > > > +			iommus = <&apps_smmu 0x432 0x0000>,
> > > > +				 <&apps_smmu 0x438 0x0001>,
> > > > +				 <&apps_smmu 0x43f 0x0000>,
> > > > +				 <&apps_smmu 0x426 0x0011>,
> > > > +				 <&apps_smmu 0x436 0x0011>;
> > >
> > > The last two lines look equivalent to me: 0x436 & ~0x0011 = 0x426.
> > 
> > I don't understand the IOMMU SID + mask really, but I think I've seen
> > somewhere before like here that TZ can be a bit picky with the SIDs?
> > 
> > https://lore.kernel.org/linux-arm-msm/opqdrmyj3y64nqqqmakjydn5rkspizufyeavm7ec7c7ufqz4wk@ey2a7bq3shfj/
> > https://lore.kernel.org/linux-arm-msm/11b5db69-49f5-4d7b-81c9-687d66a5cb0d@linaro.org/
> > 
> > I don't quite want to risk having some obscure use case breaking because
> > we cleaned up the dts ;)
> > 
> > But if you're more sure than me that it won't break, let me know!
> > 
> > >
> > > It's also a bit weird that the mask has one more digit than the stream
> > > ID. And ordered numerically (by stream ID, first number) it would be a
> > > bit easier to read. :-)
> > 
> > Sorting them is no problem, can do that for v2.
> > 
>
> Where you able to do this? I don't see a v2 in my inbox, am I just
> searching poorly?

Only sent v2 some minutes ago, didn't have any more time on Friday.

Regards
Luca

>
> Regards,
> Bjorn
>
> > >
> > > Thanks,
> > > Stephan
> > 