From: "David E. Box" <david.e.box@linux.intel.com>
To: irenic.rajneesh@gmail.com, david.e.box@linux.intel.com,
hdegoede@redhat.com, mgross@linux.intel.com,
gayatri.kammela@intel.com
Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V2 9/9] platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P
Date: Fri, 16 Apr 2021 20:12:52 -0700 [thread overview]
Message-ID: <20210417031252.3020837-10-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20210417031252.3020837-1-david.e.box@linux.intel.com>
Alder PCH-P is based on Tiger Lake PCH.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
---
V2: No change
drivers/platform/x86/intel_pmc_core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index 786b67171ddc..900aa5e40a0f 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -1577,6 +1577,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = {
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &tgl_reg_map),
X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &icl_reg_map),
X86_MATCH_INTEL_FAM6_MODEL(ROCKETLAKE, &tgl_reg_map),
+ X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, &tgl_reg_map),
{}
};
--
2.25.1
next prev parent reply other threads:[~2021-04-17 3:12 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-17 3:12 [PATCH V2 0/9] intel_pmc_core: Add sub-state requirements and mode David E. Box
2021-04-17 3:12 ` [PATCH V2 1/9] platform/x86: intel_pmc_core: Don't use global pmcdev in quirks David E. Box
2021-04-17 3:12 ` [PATCH V2 2/9] platform/x86: intel_pmc_core: Remove global struct pmc_dev David E. Box
2021-04-17 3:12 ` [PATCH V2 3/9] platform/x86: intel_pmc_core: Handle sub-states generically David E. Box
2021-04-17 3:12 ` [PATCH V2 4/9] platform/x86: intel_pmc_core: Show LPM residency in microseconds David E. Box
2021-04-17 3:12 ` [PATCH V2 5/9] platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake David E. Box
2021-04-17 5:55 ` kernel test robot
2021-04-17 6:25 ` kernel test robot
2021-04-17 8:52 ` Hans de Goede
2021-04-18 1:59 ` David E. Box
2021-04-17 9:00 ` Hans de Goede
2021-04-18 1:43 ` David E. Box
2021-04-17 3:12 ` [PATCH V2 6/9] platform/x86: intel_pmc_core: Add requirements file to debugfs David E. Box
2021-04-17 3:12 ` [PATCH V2 7/9] platform/x86: intel_pmc_core: Add option to set/clear LPM mode David E. Box
2021-04-17 3:12 ` [PATCH V2 8/9] platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake David E. Box
2021-04-17 3:12 ` David E. Box [this message]
2021-04-17 9:12 ` [PATCH V2 0/9] intel_pmc_core: Add sub-state requirements and mode Hans de Goede
2021-04-19 8:47 ` Hans de Goede
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