From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, amarkovic@wavecomp.com
Subject: [Qemu-devel] [PULL 06/17] hw/mips/gt64xxx_pci: Convert debug printf()s to trace events
Date: Wed, 26 Jun 2019 13:45:39 +0200 [thread overview]
Message-ID: <1561549550-3501-7-git-send-email-aleksandar.markovic@rt-rk.com> (raw)
In-Reply-To: <1561549550-3501-1-git-send-email-aleksandar.markovic@rt-rk.com>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20190624222844.26584-7-f4bug@amsat.org>
---
Makefile.objs | 1 +
hw/mips/gt64xxx_pci.c | 29 ++++++++++-------------------
hw/mips/trace-events | 4 ++++
3 files changed, 15 insertions(+), 19 deletions(-)
create mode 100644 hw/mips/trace-events
diff --git a/Makefile.objs b/Makefile.objs
index 658cfc9..3b83621 100644
--- a/Makefile.objs
+++ b/Makefile.objs
@@ -163,6 +163,7 @@ trace-events-subdirs += hw/input
trace-events-subdirs += hw/intc
trace-events-subdirs += hw/isa
trace-events-subdirs += hw/mem
+trace-events-subdirs += hw/mips
trace-events-subdirs += hw/misc
trace-events-subdirs += hw/misc/macio
trace-events-subdirs += hw/net
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index f44326f..815ef07 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -30,14 +30,7 @@
#include "hw/pci/pci_host.h"
#include "hw/i386/pc.h"
#include "exec/address-spaces.h"
-
-//#define DEBUG
-
-#ifdef DEBUG
-#define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __func__, ##__VA_ARGS__)
-#else
-#define DPRINTF(fmt, ...)
-#endif
+#include "trace.h"
#define GT_REGS (0x1000 >> 2)
@@ -294,9 +287,7 @@ static void gt64120_isd_mapping(GT64120State *s)
check_reserved_space(&start, &length);
length = 0x1000;
/* Map new address */
- DPRINTF("ISD: "TARGET_FMT_plx"@"TARGET_FMT_plx
- " -> "TARGET_FMT_plx"@"TARGET_FMT_plx"\n",
- s->ISD_length, s->ISD_start, length, start);
+ trace_gt64120_isd_remap(s->ISD_length, s->ISD_start, length, start);
s->ISD_start = start;
s->ISD_length = length;
memory_region_add_subregion(get_system_memory(), s->ISD_start, &s->ISD_mem);
@@ -648,19 +639,19 @@ static void gt64120_writel(void *opaque, hwaddr addr,
/* not really implemented */
s->regs[saddr] = ~(~(s->regs[saddr]) | ~(val & 0xfffffffe));
s->regs[saddr] |= !!(s->regs[saddr] & 0xfffffffe);
- DPRINTF("INTRCAUSE %" PRIx64 "\n", val);
+ trace_gt64120_write("INTRCAUSE", size << 1, val);
break;
case GT_INTRMASK:
s->regs[saddr] = val & 0x3c3ffffe;
- DPRINTF("INTRMASK %" PRIx64 "\n", val);
+ trace_gt64120_write("INTRMASK", size << 1, val);
break;
case GT_PCI0_ICMASK:
s->regs[saddr] = val & 0x03fffffe;
- DPRINTF("ICMASK %" PRIx64 "\n", val);
+ trace_gt64120_write("ICMASK", size << 1, val);
break;
case GT_PCI0_SERR0MASK:
s->regs[saddr] = val & 0x0000003f;
- DPRINTF("SERR0MASK %" PRIx64 "\n", val);
+ trace_gt64120_write("SERR0MASK", size << 1, val);
break;
/* Reserved when only PCI_0 is configured. */
@@ -936,19 +927,19 @@ static uint64_t gt64120_readl(void *opaque,
/* Interrupts */
case GT_INTRCAUSE:
val = s->regs[saddr];
- DPRINTF("INTRCAUSE %x\n", val);
+ trace_gt64120_read("INTRCAUSE", size << 1, val);
break;
case GT_INTRMASK:
val = s->regs[saddr];
- DPRINTF("INTRMASK %x\n", val);
+ trace_gt64120_read("INTRMASK", size << 1, val);
break;
case GT_PCI0_ICMASK:
val = s->regs[saddr];
- DPRINTF("ICMASK %x\n", val);
+ trace_gt64120_read("ICMASK", size << 1, val);
break;
case GT_PCI0_SERR0MASK:
val = s->regs[saddr];
- DPRINTF("SERR0MASK %x\n", val);
+ trace_gt64120_read("SERR0MASK", size << 1, val);
break;
/* Reserved when only PCI_0 is configured. */
diff --git a/hw/mips/trace-events b/hw/mips/trace-events
new file mode 100644
index 0000000..75d4c73
--- /dev/null
+++ b/hw/mips/trace-events
@@ -0,0 +1,4 @@
+# gt64xxx.c
+gt64120_read(const char *regname, int width, uint64_t value) "gt64120 read %s value:0x%0*" PRIx64
+gt64120_write(const char *regname, int width, uint64_t value) "gt64120 write %s value:0x%0*" PRIx64
+gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRIx64 "@0x%08" PRIx64
--
2.7.4
next prev parent reply other threads:[~2019-06-26 11:54 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 11:45 [Qemu-devel] [PULL 00/17] MIPS queue for June 2016th, 2019 Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 01/17] hw/mips/gt64xxx_pci: Fix multiline comment syntax Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 02/17] hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 03/17] hw/mips/gt64xxx_pci: Fix 'braces' " Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 04/17] hw/mips/gt64xxx_pci: Fix 'spaces' " Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 05/17] hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf() Aleksandar Markovic
2019-06-26 11:45 ` Aleksandar Markovic [this message]
2019-06-26 11:45 ` [Qemu-devel] [PULL 07/17] hw/mips/gt64xxx_pci: Align the pci0-mem size Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 08/17] dma/rc4030: Fix off-by-one error in specified memory region size Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 09/17] dma/rc4030: Minor code style cleanup Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 10/17] tests/tcg: target/mips: Add tests for MSA bit move instructions Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 11/17] tests/tcg: target/mips: Add tests for MSA " Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 12/17] tests/tcg: target/mips: Amend tests for MSA int dot product instructions Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 13/17] tests/tcg: target/mips: Amend tests for MSA int multiply instructions Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 14/17] tests/tcg: target/mips: Add support for MSA big-endian target testings Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 15/17] tests/tcg: target/mips: Add support for MSA MIPS32R6 testings Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 16/17] tests/tcg: target/mips: Fix some test cases for pack MSA instructions Aleksandar Markovic
2019-06-26 11:45 ` [Qemu-devel] [PULL 17/17] target/mips: Fix big endian host behavior for interleave " Aleksandar Markovic
2019-07-01 14:55 ` [Qemu-devel] [PULL 00/17] MIPS queue for June 2016th, 2019 Peter Maydell
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