From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<eric.auger@redhat.com>, <shannon.zhaosl@gmail.com>,
<imammedo@redhat.com>, <mst@redhat.com>,
<marcel.apfelbaum@gmail.com>, <peter.maydell@linaro.org>,
<ehabkost@redhat.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>
Cc: xieyingtai@huawei.com, cenjiahui@huawei.com, wangxingang5@huawei.com
Subject: [PATCH RFC RESEND v2 3/6] hw/pci: Add pci_root_bus_max_bus
Date: Thu, 25 Mar 2021 07:22:42 +0000 [thread overview]
Message-ID: <1616656965-23328-4-git-send-email-wangxingang5@huawei.com> (raw)
In-Reply-To: <1616656965-23328-1-git-send-email-wangxingang5@huawei.com>
From: Xingang Wang <wangxingang5@huawei.com>
This helps to find max bus number of a root bus.
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
---
hw/pci/pci.c | 34 ++++++++++++++++++++++++++++++++++
include/hw/pci/pci.h | 1 +
2 files changed, 35 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index e17aa9075f..c7957cbf7c 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -538,6 +538,40 @@ int pci_bus_num(PCIBus *s)
return PCI_BUS_GET_CLASS(s)->bus_num(s);
}
+int pci_root_bus_max_bus(PCIBus *bus)
+{
+ PCIHostState *host;
+ PCIDevice *dev;
+ int max_bus = 0;
+ int type, devfn;
+ uint8_t subordinate;
+
+ if (!pci_bus_is_root(bus)) {
+ return 0;
+ }
+
+ host = PCI_HOST_BRIDGE(BUS(bus)->parent);
+ max_bus = pci_bus_num(host->bus);
+
+ for (devfn = 0; devfn < ARRAY_SIZE(host->bus->devices); devfn++) {
+ dev = host->bus->devices[devfn];
+
+ if (!dev) {
+ continue;
+ }
+
+ type = dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION;
+ if (type == PCI_HEADER_TYPE_BRIDGE) {
+ subordinate = dev->config[PCI_SUBORDINATE_BUS];
+ if (subordinate > max_bus) {
+ max_bus = subordinate;
+ }
+ }
+ }
+
+ return max_bus;
+}
+
int pci_bus_numa_node(PCIBus *bus)
{
return PCI_BUS_GET_CLASS(bus)->numa_node(bus);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 718b5a454a..e0c69534f4 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -450,6 +450,7 @@ static inline PCIBus *pci_get_bus(const PCIDevice *dev)
return PCI_BUS(qdev_get_parent_bus(DEVICE(dev)));
}
int pci_bus_num(PCIBus *s);
+int pci_root_bus_max_bus(PCIBus *bus);
static inline int pci_dev_bus_num(const PCIDevice *dev)
{
return pci_bus_num(pci_get_bus(dev));
--
2.19.1
next prev parent reply other threads:[~2021-03-25 7:24 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-25 7:22 [PATCH RFC RESEND v2 0/6] Introduce IOMMU Option For PCI Root Bus Wang Xingang
2021-03-25 7:22 ` [PATCH RFC RESEND v2 1/6] hw/pci/pci_host: Add iommu property for pci host Wang Xingang
2021-04-12 17:36 ` Auger Eric
2021-04-13 3:25 ` Wang Xingang
2021-03-25 7:22 ` [PATCH RFC RESEND v2 2/6] hw/pci: Add iommu option for pci root bus Wang Xingang
2021-04-12 17:36 ` Auger Eric
2021-04-13 3:34 ` Wang Xingang
2021-03-25 7:22 ` Wang Xingang [this message]
2021-04-13 8:05 ` [PATCH RFC RESEND v2 3/6] hw/pci: Add pci_root_bus_max_bus Auger Eric
2021-04-13 11:35 ` Xingang Wang
2021-03-25 7:22 ` [PATCH RFC RESEND v2 4/6] hw/arm/virt-acpi-build: Add explicit idmap info in IORT table Wang Xingang
2021-04-13 9:03 ` Auger Eric
2021-04-13 12:00 ` Xingang Wang
2021-03-25 7:22 ` [PATCH RFC RESEND v2 5/6] hw/i386/acpi-build: Add explicit scope in DMAR table Wang Xingang
2021-03-25 7:22 ` [PATCH RFC RESEND v2 6/6] hw/i386/acpi-build: Add iommu filter in IVRS table Wang Xingang
2021-03-31 9:00 ` [PATCH RFC RESEND v2 0/6] Introduce IOMMU Option For PCI Root Bus Wang Xingang
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