From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, philmd@redhat.com, tsimpson@quicinc.com,
richard.henderson@linaro.org, bcain@quicinc.com
Subject: [PATCH v2 03/21] Hexagon (target/hexagon) use env_archcpu and env_cpu
Date: Wed, 31 Mar 2021 22:53:15 -0500 [thread overview]
Message-ID: <1617249213-22667-4-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1617249213-22667-1-git-send-email-tsimpson@quicinc.com>
Remove hexagon_env_get_cpu and replace with env_archcpu
Replace CPU(hexagon_env_get_cpu(env)) with env_cpu(env)
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
linux-user/hexagon/cpu_loop.c | 2 +-
target/hexagon/cpu.c | 4 ++--
target/hexagon/cpu.h | 5 -----
target/hexagon/op_helper.c | 2 +-
target/hexagon/translate.c | 2 +-
5 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c
index 9a68ca0..bc34f5d 100644
--- a/linux-user/hexagon/cpu_loop.c
+++ b/linux-user/hexagon/cpu_loop.c
@@ -25,7 +25,7 @@
void cpu_loop(CPUHexagonState *env)
{
- CPUState *cs = CPU(hexagon_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
int trapnr, signum, sigcode;
target_ulong sigaddr;
target_ulong syscallnum;
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index c2fe357..f044506 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -71,7 +71,7 @@ const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS] = {
*/
static target_ulong adjust_stack_ptrs(CPUHexagonState *env, target_ulong addr)
{
- HexagonCPU *cpu = hexagon_env_get_cpu(env);
+ HexagonCPU *cpu = env_archcpu(env);
target_ulong stack_adjust = cpu->lldb_stack_adjust;
target_ulong stack_start = env->stack_start;
target_ulong stack_size = 0x10000;
@@ -115,7 +115,7 @@ static void print_reg(FILE *f, CPUHexagonState *env, int regnum)
static void hexagon_dump(CPUHexagonState *env, FILE *f)
{
- HexagonCPU *cpu = hexagon_env_get_cpu(env);
+ HexagonCPU *cpu = env_archcpu(env);
if (cpu->lldb_compat) {
/*
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index e04eac5..2855dd3 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -127,11 +127,6 @@ typedef struct HexagonCPU {
target_ulong lldb_stack_adjust;
} HexagonCPU;
-static inline HexagonCPU *hexagon_env_get_cpu(CPUHexagonState *env)
-{
- return container_of(env, HexagonCPU, env);
-}
-
#include "cpu_bits.h"
#define cpu_signal_handler cpu_hexagon_signal_handler
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 5d35dfc..7ac8554 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -35,7 +35,7 @@ static void QEMU_NORETURN do_raise_exception_err(CPUHexagonState *env,
uint32_t exception,
uintptr_t pc)
{
- CPUState *cs = CPU(hexagon_env_get_cpu(env));
+ CPUState *cs = env_cpu(env);
qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
cs->exception_index = exception;
cpu_loop_exit_restore(cs, pc);
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index f975d7a..e235fdb 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -585,7 +585,7 @@ static void hexagon_tr_translate_packet(DisasContextBase *dcbase, CPUState *cpu)
* The CPU log is used to compare against LLDB single stepping,
* so end the TLB after every packet.
*/
- HexagonCPU *hex_cpu = hexagon_env_get_cpu(env);
+ HexagonCPU *hex_cpu = env_archcpu(env);
if (hex_cpu->lldb_compat && qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
ctx->base.is_jmp = DISAS_TOO_MANY;
}
--
2.7.4
next prev parent reply other threads:[~2021-04-01 4:03 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 3:53 [PATCH v2 00/21] Hexagon (target/hexagon) update Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 01/21] Hexagon (target/hexagon) TCG generation cleanup Taylor Simpson
2021-04-02 17:25 ` Richard Henderson
2021-04-02 17:46 ` Richard Henderson
2021-04-02 19:42 ` Taylor Simpson
2021-04-02 20:00 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 02/21] Hexagon (target/hexagon) remove unnecessary inline directives Taylor Simpson
2021-04-02 17:26 ` Richard Henderson
2021-04-01 3:53 ` Taylor Simpson [this message]
2021-04-02 17:27 ` [PATCH v2 03/21] Hexagon (target/hexagon) use env_archcpu and env_cpu Richard Henderson
2021-04-01 3:53 ` [PATCH v2 04/21] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Taylor Simpson
2021-04-02 17:34 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 05/21] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Taylor Simpson
2021-04-02 17:44 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 06/21] Hexagon (target/hexagon) change variables from int to bool when appropriate Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 07/21] Hexagon (target/hexagon) remove unused carry_from_add64 function Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 08/21] Hexagon (target/hexagon) change type of softfloat_roundingmodes Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 09/21] Hexagon (target/hexagon) use softfloat default NaN and tininess Taylor Simpson
2021-04-02 17:48 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 10/21] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 11/21] Hexagon (target/hexagon) use softfloat for float-to-int conversions Taylor Simpson
2021-04-06 20:09 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 12/21] Hexagon (target/hexagon) add F2_sfrecipa instruction Taylor Simpson
2021-04-06 20:30 ` Richard Henderson
2021-04-06 20:46 ` Richard Henderson
2021-04-06 21:55 ` Taylor Simpson
2021-04-06 22:13 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 13/21] Hexagon (target/hexagon) add F2_sfinvsqrta Taylor Simpson
2021-04-06 20:47 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 14/21] Hexagon (target/hexagon) add A5_ACS (vacsh) Taylor Simpson
2021-04-06 20:51 ` Richard Henderson
2021-04-06 21:31 ` Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 15/21] Hexagon (target/hexagon) add A6_vminub_RdP Taylor Simpson
2021-04-06 20:57 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 16/21] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Taylor Simpson
2021-04-06 21:11 ` Richard Henderson
2021-04-06 21:58 ` Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 17/21] Hexagon (target/hexagon) circular addressing Taylor Simpson
2021-04-06 22:11 ` Richard Henderson
2021-04-07 3:11 ` Taylor Simpson
2021-04-07 16:27 ` Taylor Simpson
2021-04-01 3:53 ` [PATCH v2 18/21] Hexagon (target/hexagon) bit reverse (brev) addressing Taylor Simpson
2021-04-06 22:35 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 19/21] Hexagon (target/hexagon) load and unpack bytes instructions Taylor Simpson
2021-04-06 22:46 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 20/21] Hexagon (target/hexagon) load into shifted register instructions Taylor Simpson
2021-04-06 22:50 ` Richard Henderson
2021-04-01 3:53 ` [PATCH v2 21/21] Hexagon (target/hexagon) CABAC decode bin Taylor Simpson
2021-04-06 22:54 ` Richard Henderson
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