From: Yoshinori Sato <ysato@users.sourceforge.jp>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
Richard Henderson <richard.henderson@linaro.org>,
Yoshinori Sato <ysato@users.sourceforge.jp>,
philmd@redhat.com
Subject: [Qemu-devel] [PATCH v20 18/24] hw/rx: Honor -accel qtest
Date: Sun, 16 Jun 2019 23:28:30 +0900 [thread overview]
Message-ID: <20190616142836.10614-19-ysato@users.sourceforge.jp> (raw)
In-Reply-To: <20190616142836.10614-1-ysato@users.sourceforge.jp>
From: Richard Henderson <richard.henderson@linaro.org>
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Message-Id: <20190607091116.49044-16-ysato@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
We could squash this with the previous patch
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
hw/rx/rx62n.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c
index 74d2fd0ee3..05d82d0b8f 100644
--- a/hw/rx/rx62n.c
+++ b/hw/rx/rx62n.c
@@ -21,11 +21,13 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/error-report.h"
#include "hw/hw.h"
#include "hw/rx/rx62n.h"
#include "hw/loader.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
+#include "sysemu/qtest.h"
#include "cpu.h"
/*
@@ -190,8 +192,14 @@ static void rx62n_realize(DeviceState *dev, Error **errp)
memory_region_init_rom(&s->c_flash, NULL, "codeflash",
RX62N_CFLASH_SIZE, errp);
memory_region_add_subregion(s->sysmem, RX62N_CFLASH_BASE, &s->c_flash);
+
if (!s->kernel) {
- rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ if (bios_name) {
+ rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ } else if (!qtest_enabled()) {
+ error_report("No bios or kernel specified");
+ exit(1);
+ }
}
/* Initialize CPU */
--
2.11.0
next prev parent reply other threads:[~2019-06-16 14:43 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-16 14:28 [Qemu-devel] [PATCH v20 00/24] Add RX archtecture support Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 01/24] target/rx: TCG translation Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 02/24] target/rx: TCG helper Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 03/24] target/rx: CPU definition Yoshinori Sato
2019-06-16 18:13 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 04/24] target/rx: Follow the change of tcg Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 05/24] target/rx: simplify rx_cpu_class_by_name Yoshinori Sato
2019-06-16 18:33 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 06/24] target/rx: RX disassembler Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 07/24] target/rx: Disassemble rx_index_addr into a string Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 08/24] target/rx: Replace operand with prt_ldmi in disassembler Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 09/24] target/rx: Use prt_ldmi for XCHG_mr disassembly Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 10/24] target/rx: Emit all disassembly in one prt() Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 11/24] target/rx: Collect all bytes during disassembly Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 12/24] target/rx: Dump bytes for each insn " Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 13/24] hw/intc: RX62N interrupt controller (ICUa) Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 14/24] hw/timer: RX62N internal timer modules Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 15/24] hw/char: RX62N serial communication interface (SCI) Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 16/24] hw/rx: RX Target hardware definition Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 17/24] target/rx: Move rx_load_image to rx-virt Yoshinori Sato
2019-06-16 18:49 ` Igor Mammedov
2019-06-16 14:28 ` Yoshinori Sato [this message]
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 19/24] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 20/24] qemu/bitops.h: Add extract8 and extract16 Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 21/24] hw/registerfields.h: Add 8bit and 16bit register macros Yoshinori Sato
2019-06-16 19:06 ` Igor Mammedov
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 22/24] Add rx-softmmu Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 23/24] MAINTAINERS: Add RX Yoshinori Sato
2019-06-16 14:28 ` [Qemu-devel] [PATCH v20 24/24] BootLinuxConsoleTest: Test the RX-Virt machine Yoshinori Sato
2019-06-16 15:18 ` [Qemu-devel] [PATCH v20 00/24] Add RX archtecture support no-reply
2019-06-16 19:08 ` Igor Mammedov
2019-06-16 15:55 ` no-reply
2019-06-16 16:45 ` no-reply
2019-06-16 17:26 ` no-reply
2019-06-16 17:33 ` no-reply
2019-06-16 18:00 ` no-reply
2019-06-16 18:18 ` no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190616142836.10614-19-ysato@users.sourceforge.jp \
--to=ysato@users.sourceforge.jp \
--cc=peter.maydell@linaro.org \
--cc=philmd@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).