[Qemu-devel] [RFC PATCH v4 38/75] target/i386: introduce MMX vector instructions to sse-opcode.inc.h

[Jan Bobek <jan.bobek@gmail.com>]

Add all MMX vector instruction entries to sse-opcode.inc.h.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/sse-opcode.inc.h | 136 +++++++++++++++++++++++++++++++++++
 1 file changed, 136 insertions(+)

diff --git a/target/i386/sse-opcode.inc.h b/target/i386/sse-opcode.inc.h
index 04d0c49168..e570d449fc 100644
--- a/target/i386/sse-opcode.inc.h
+++ b/target/i386/sse-opcode.inc.h
@@ -42,6 +42,142 @@
 #   define OPCODE_GRP_END(grpname)
 #endif /* OPCODE_GRP_END */
 
+/*
+ * MMX Instructions
+ * -----------------
+ * NP 0F 6E /r          MOVD mm,r/m32
+ * NP 0F 7E /r          MOVD r/m32,mm
+ * NP REX.W + 0F 6E /r  MOVQ mm,r/m64
+ * NP REX.W + 0F 7E /r  MOVQ r/m64,mm
+ * NP 0F 6F /r          MOVQ mm, mm/m64
+ * NP 0F 7F /r          MOVQ mm/m64, mm
+ * NP 0F FC /r          PADDB mm, mm/m64
+ * NP 0F FD /r          PADDW mm, mm/m64
+ * NP 0F FE /r          PADDD mm, mm/m64
+ * NP 0F EC /r          PADDSB mm, mm/m64
+ * NP 0F ED /r          PADDSW mm, mm/m64
+ * NP 0F DC /r          PADDUSB mm,mm/m64
+ * NP 0F DD /r          PADDUSW mm,mm/m64
+ * NP 0F F8 /r          PSUBB mm, mm/m64
+ * NP 0F F9 /r          PSUBW mm, mm/m64
+ * NP 0F FA /r          PSUBD mm, mm/m64
+ * NP 0F E8 /r          PSUBSB mm, mm/m64
+ * NP 0F E9 /r          PSUBSW mm, mm/m64
+ * NP 0F D8 /r          PSUBUSB mm, mm/m64
+ * NP 0F D9 /r          PSUBUSW mm, mm/m64
+ * NP 0F D5 /r          PMULLW mm, mm/m64
+ * NP 0F E5 /r          PMULHW mm, mm/m64
+ * NP 0F F5 /r          PMADDWD mm, mm/m64
+ * NP 0F 74 /r          PCMPEQB mm,mm/m64
+ * NP 0F 75 /r          PCMPEQW mm,mm/m64
+ * NP 0F 76 /r          PCMPEQD mm,mm/m64
+ * NP 0F 64 /r          PCMPGTB mm,mm/m64
+ * NP 0F 65 /r          PCMPGTW mm,mm/m64
+ * NP 0F 66 /r          PCMPGTD mm,mm/m64
+ * NP 0F DB /r          PAND mm, mm/m64
+ * NP 0F DF /r          PANDN mm, mm/m64
+ * NP 0F EB /r          POR mm, mm/m64
+ * NP 0F EF /r          PXOR mm, mm/m64
+ * NP 0F F1 /r          PSLLW mm, mm/m64
+ * NP 0F F2 /r          PSLLD mm, mm/m64
+ * NP 0F F3 /r          PSLLQ mm, mm/m64
+ * NP 0F D1 /r          PSRLW mm, mm/m64
+ * NP 0F D2 /r          PSRLD mm, mm/m64
+ * NP 0F D3 /r          PSRLQ mm, mm/m64
+ * NP 0F E1 /r          PSRAW mm,mm/m64
+ * NP 0F E2 /r          PSRAD mm,mm/m64
+ * NP 0F 63 /r          PACKSSWB mm1, mm2/m64
+ * NP 0F 6B /r          PACKSSDW mm1, mm2/m64
+ * NP 0F 67 /r          PACKUSWB mm, mm/m64
+ * NP 0F 68 /r          PUNPCKHBW mm, mm/m64
+ * NP 0F 69 /r          PUNPCKHWD mm, mm/m64
+ * NP 0F 6A /r          PUNPCKHDQ mm, mm/m64
+ * NP 0F 60 /r          PUNPCKLBW mm, mm/m32
+ * NP 0F 61 /r          PUNPCKLWD mm, mm/m32
+ * NP 0F 62 /r          PUNPCKLDQ mm, mm/m32
+ * NP 0F 77             EMMS
+ * NP 0F 71 /6 ib       PSLLW mm1, imm8
+ * NP 0F 71 /2 ib       PSRLW mm, imm8
+ * NP 0F 71 /4 ib       PSRAW mm,imm8
+ * NP 0F 72 /6 ib       PSLLD mm, imm8
+ * NP 0F 72 /2 ib       PSRLD mm, imm8
+ * NP 0F 72 /4 ib       PSRAD mm,imm8
+ * NP 0F 73 /6 ib       PSLLQ mm, imm8
+ * NP 0F 73 /2 ib       PSRLQ mm, imm8
+ */
+
+OPCODE(movd, LEG(NP, 0F, 0, 0x6e), MMX, WR, Pq, Ed)
+OPCODE(movd, LEG(NP, 0F, 0, 0x7e), MMX, WR, Ed, Pq)
+OPCODE(movq, LEG(NP, 0F, 1, 0x6e), MMX, WR, Pq, Eq)
+OPCODE(movq, LEG(NP, 0F, 1, 0x7e), MMX, WR, Eq, Pq)
+OPCODE(movq, LEG(NP, 0F, 0, 0x6f), MMX, WR, Pq, Qq)
+OPCODE(movq, LEG(NP, 0F, 0, 0x7f), MMX, WR, Qq, Pq)
+OPCODE(paddb, LEG(NP, 0F, 0, 0xfc), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddw, LEG(NP, 0F, 0, 0xfd), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddd, LEG(NP, 0F, 0, 0xfe), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddsb, LEG(NP, 0F, 0, 0xec), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddsw, LEG(NP, 0F, 0, 0xed), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddusb, LEG(NP, 0F, 0, 0xdc), MMX, WRR, Pq, Pq, Qq)
+OPCODE(paddusw, LEG(NP, 0F, 0, 0xdd), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubb, LEG(NP, 0F, 0, 0xf8), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubw, LEG(NP, 0F, 0, 0xf9), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubd, LEG(NP, 0F, 0, 0xfa), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubsb, LEG(NP, 0F, 0, 0xe8), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubsw, LEG(NP, 0F, 0, 0xe9), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubusb, LEG(NP, 0F, 0, 0xd8), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psubusw, LEG(NP, 0F, 0, 0xd9), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pmullw, LEG(NP, 0F, 0, 0xd5), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pmulhw, LEG(NP, 0F, 0, 0xe5), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pmaddwd, LEG(NP, 0F, 0, 0xf5), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpeqb, LEG(NP, 0F, 0, 0x74), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpeqw, LEG(NP, 0F, 0, 0x75), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpeqd, LEG(NP, 0F, 0, 0x76), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpgtb, LEG(NP, 0F, 0, 0x64), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpgtw, LEG(NP, 0F, 0, 0x65), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pcmpgtd, LEG(NP, 0F, 0, 0x66), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pand, LEG(NP, 0F, 0, 0xdb), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pandn, LEG(NP, 0F, 0, 0xdf), MMX, WRR, Pq, Pq, Qq)
+OPCODE(por, LEG(NP, 0F, 0, 0xeb), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pxor, LEG(NP, 0F, 0, 0xef), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psllw, LEG(NP, 0F, 0, 0xf1), MMX, WRR, Pq, Pq, Qq)
+OPCODE(pslld, LEG(NP, 0F, 0, 0xf2), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psllq, LEG(NP, 0F, 0, 0xf3), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psrlw, LEG(NP, 0F, 0, 0xd1), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psrld, LEG(NP, 0F, 0, 0xd2), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psrlq, LEG(NP, 0F, 0, 0xd3), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psraw, LEG(NP, 0F, 0, 0xe1), MMX, WRR, Pq, Pq, Qq)
+OPCODE(psrad, LEG(NP, 0F, 0, 0xe2), MMX, WRR, Pq, Pq, Qq)
+OPCODE(packsswb, LEG(NP, 0F, 0, 0x63), MMX, WRR, Pq, Pq, Qq)
+OPCODE(packssdw, LEG(NP, 0F, 0, 0x6b), MMX, WRR, Pq, Pq, Qq)
+OPCODE(packuswb, LEG(NP, 0F, 0, 0x67), MMX, WRR, Pq, Pq, Qq)
+OPCODE(punpckhbw, LEG(NP, 0F, 0, 0x68), MMX, WRR, Pq, Pq, Qq)
+OPCODE(punpckhwd, LEG(NP, 0F, 0, 0x69), MMX, WRR, Pq, Pq, Qq)
+OPCODE(punpckhdq, LEG(NP, 0F, 0, 0x6a), MMX, WRR, Pq, Pq, Qq)
+OPCODE(punpcklbw, LEG(NP, 0F, 0, 0x60), MMX, WRR, Pq, Pq, Qd)
+OPCODE(punpcklwd, LEG(NP, 0F, 0, 0x61), MMX, WRR, Pq, Pq, Qd)
+OPCODE(punpckldq, LEG(NP, 0F, 0, 0x62), MMX, WRR, Pq, Pq, Qd)
+OPCODE(emms, LEG(NP, 0F, 0, 0x77), MMX, )
+
+OPCODE_GRP(grp12_LEG_NP, LEG(NP, 0F, 0, 0x71))
+OPCODE_GRP_BEGIN(grp12_LEG_NP)
+    OPCODE_GRPMEMB(grp12_LEG_NP, psllw, 6, MMX, WRR, Nq, Nq, Ib)
+    OPCODE_GRPMEMB(grp12_LEG_NP, psrlw, 2, MMX, WRR, Nq, Nq, Ib)
+    OPCODE_GRPMEMB(grp12_LEG_NP, psraw, 4, MMX, WRR, Nq, Nq, Ib)
+OPCODE_GRP_END(grp12_LEG_NP)
+
+OPCODE_GRP(grp13_LEG_NP, LEG(NP, 0F, 0, 0x72))
+OPCODE_GRP_BEGIN(grp13_LEG_NP)
+    OPCODE_GRPMEMB(grp13_LEG_NP, pslld, 6, MMX, WRR, Nq, Nq, Ib)
+    OPCODE_GRPMEMB(grp13_LEG_NP, psrld, 2, MMX, WRR, Nq, Nq, Ib)
+    OPCODE_GRPMEMB(grp13_LEG_NP, psrad, 4, MMX, WRR, Nq, Nq, Ib)
+OPCODE_GRP_END(grp13_LEG_NP)
+
+OPCODE_GRP(grp14_LEG_NP, LEG(NP, 0F, 0, 0x73))
+OPCODE_GRP_BEGIN(grp14_LEG_NP)
+    OPCODE_GRPMEMB(grp14_LEG_NP, psllq, 6, MMX, WRR, Nq, Nq, Ib)
+    OPCODE_GRPMEMB(grp14_LEG_NP, psrlq, 2, MMX, WRR, Nq, Nq, Ib)
+OPCODE_GRP_END(grp14_LEG_NP)
+
 #undef FMTI____
 #undef FMTI__R__
 #undef FMTI__RR__
-- 
2.20.1