From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Richard Henderson <richard.henderson@linaro.org>
Subject: [PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon insns to decodetree
Date: Fri, 22 May 2020 15:55:11 +0100 [thread overview]
Message-ID: <20200522145520.6778-1-peter.maydell@linaro.org> (raw)
This patchset converts the Neon insns in the 2-register-and-shift-amount
and 1-register-and-modified-immediate groups to decodetree.
Changes since v1:
* old patch 1 is now in master
* patch 1, 2, 3, 4: create and use separate formats for each size of shift
* patch 5, 6, 7: use new @2reg_shrn_[dsh] formats and keep Q bit in the
per-insn decode rather than folding it into the format
* patch 8: use %neon_rshift_i5 in new @2reg_vcvt format
* patch 9: various changes
Patches still needing review: 1, 5, 9. (RTH: you might want to look over
2 as well: I didn't use quite the same shift formats you suggested.)
thanks
-- PMM
Peter Maydell (9):
target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree
target/arm: Convert Neon VSHR 2-reg-shift insns to decodetree
target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA 2-reg-shift insns to
decodetree
target/arm: Convert VQSHLU, VQSHL 2-reg-shift insns to decodetree
target/arm: Convert Neon narrowing shifts with op==8 to decodetree
target/arm: Convert Neon narrowing shifts with op==9 to decodetree
target/arm: Convert Neon VSHLL, VMOVL to decodetree
target/arm: Convert VCVT fixed-point ops to decodetree
target/arm: Convert Neon one-register-and-immediate insns to
decodetree
target/arm/neon-dp.decode | 196 ++++++++++
target/arm/translate-neon.inc.c | 625 ++++++++++++++++++++++++++++++++
target/arm/translate.c | 488 +------------------------
3 files changed, 823 insertions(+), 486 deletions(-)
--
2.20.1
next reply other threads:[~2020-05-22 14:56 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-22 14:55 Peter Maydell [this message]
2020-05-22 14:55 ` [PATCH v2 1/9] target/arm: Convert Neon VSHL and VSLI 2-reg-shift insn to decodetree Peter Maydell
2020-06-01 23:08 ` Richard Henderson
2020-05-22 14:55 ` [PATCH v2 2/9] target/arm: Convert Neon VSHR 2-reg-shift insns " Peter Maydell
2020-05-22 14:55 ` [PATCH v2 3/9] target/arm: Convert Neon VSRA, VSRI, VRSHR, VRSRA " Peter Maydell
2020-05-22 14:55 ` [PATCH v2 4/9] target/arm: Convert VQSHLU, VQSHL " Peter Maydell
2020-06-01 23:12 ` Richard Henderson
2020-05-22 14:55 ` [PATCH v2 5/9] target/arm: Convert Neon narrowing shifts with op==8 " Peter Maydell
2020-05-22 22:16 ` Peter Maydell
2020-06-01 23:13 ` Richard Henderson
2020-05-22 14:55 ` [PATCH v2 6/9] target/arm: Convert Neon narrowing shifts with op==9 " Peter Maydell
2020-05-22 14:55 ` [PATCH v2 7/9] target/arm: Convert Neon VSHLL, VMOVL " Peter Maydell
2020-05-22 14:55 ` [PATCH v2 8/9] target/arm: Convert VCVT fixed-point ops " Peter Maydell
2020-05-22 14:55 ` [PATCH v2 9/9] target/arm: Convert Neon one-register-and-immediate insns " Peter Maydell
2020-06-01 23:32 ` Richard Henderson
2020-06-02 8:58 ` Peter Maydell
2020-05-22 19:19 ` [PATCH v2 0/9] target/arm: Convert 2-reg-shift and 1-reg-imm Neon " no-reply
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