From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: "Keith Packard" <keithp@keithp.com>,
qemu-devel@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [PULL 23/30] semihosting: Change common-semi API to be architecture-independent
Date: Fri, 15 Jan 2021 13:08:21 +0000 [thread overview]
Message-ID: <20210115130828.23968-24-alex.bennee@linaro.org> (raw)
In-Reply-To: <20210115130828.23968-1-alex.bennee@linaro.org>
From: Keith Packard <keithp@keithp.com>
The public API is now defined in
hw/semihosting/common-semi.h. do_common_semihosting takes CPUState *
instead of CPUARMState *. All internal functions have been renamed
common_semi_ instead of arm_semi_ or arm_. Aside from the API change,
there are no functional changes in this patch.
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210107170717.2098982-3-keithp@keithp.com>
Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
diff --git a/hw/semihosting/common-semi.h b/hw/semihosting/common-semi.h
new file mode 100644
index 0000000000..bc53e92c79
--- /dev/null
+++ b/hw/semihosting/common-semi.h
@@ -0,0 +1,36 @@
+/*
+ * Semihosting support for systems modeled on the Arm "Angel"
+ * semihosting syscalls design.
+ *
+ * Copyright (c) 2005, 2007 CodeSourcery.
+ * Copyright (c) 2019 Linaro
+ * Written by Paul Brook.
+ *
+ * Copyright © 2020 by Keith Packard <keithp@keithp.com>
+ * Adapted for systems other than ARM, including RISC-V, by Keith Packard
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ *
+ * ARM Semihosting is documented in:
+ * Semihosting for AArch32 and AArch64 Release 2.0
+ * https://static.docs.arm.com/100863/0200/semihosting.pdf
+ *
+ */
+
+#ifndef COMMON_SEMI_H
+#define COMMON_SEMI_H
+
+target_ulong do_common_semihosting(CPUState *cs);
+
+#endif /* COMMON_SEMI_H */
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index f3bca73d98..84cc2de3b1 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1068,14 +1068,6 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o,
static inline void aarch64_add_sve_properties(Object *obj) { }
#endif
-#if !defined(CONFIG_TCG)
-static inline target_ulong do_arm_semihosting(CPUARMState *env)
-{
- g_assert_not_reached();
-}
-#else
-target_ulong do_arm_semihosting(CPUARMState *env);
-#endif
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);
diff --git a/hw/semihosting/arm-compat-semi.c b/hw/semihosting/arm-compat-semi.c
index 93360e28c7..2e959aba08 100644
--- a/hw/semihosting/arm-compat-semi.c
+++ b/hw/semihosting/arm-compat-semi.c
@@ -1,10 +1,14 @@
/*
- * Arm "Angel" semihosting syscalls
+ * Semihosting support for systems modeled on the Arm "Angel"
+ * semihosting syscalls design.
*
* Copyright (c) 2005, 2007 CodeSourcery.
* Copyright (c) 2019 Linaro
* Written by Paul Brook.
*
+ * Copyright © 2020 by Keith Packard <keithp@keithp.com>
+ * Adapted for systems other than ARM, including RISC-V, by Keith Packard
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@@ -373,12 +377,12 @@ static target_ulong arm_gdb_syscall(ARMCPU *cpu, gdb_syscall_complete_cb cb,
* do anything with its return value, because it is not necessarily
* the result of the syscall, but could just be the old value of X0.
* The only thing safe to do with this is that the callers of
- * do_arm_semihosting() will write it straight back into X0.
+ * do_common_semihosting() will write it straight back into X0.
* (In linux-user mode, the callback will have happened before
* gdb_do_syscallv() returns.)
*
* We should tidy this up so neither this function nor
- * do_arm_semihosting() return a value, so the mistake of
+ * do_common_semihosting() return a value, so the mistake of
* doing something with the return value is not possible to make.
*/
@@ -675,10 +679,10 @@ static const GuestFDFunctions guestfd_fns[] = {
* leave the register unchanged. We use 0xdeadbeef as the return value
* when there isn't a defined return value for the call.
*/
-target_ulong do_arm_semihosting(CPUARMState *env)
+target_ulong do_common_semihosting(CPUState *cs)
{
- ARMCPU *cpu = env_archcpu(env);
- CPUState *cs = env_cpu(env);
+ ARMCPU *cpu = ARM_CPU(cs);
+ CPUARMState *env = &cpu->env;
target_ulong args;
target_ulong arg0, arg1, arg2, arg3;
char * s;
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index bbe9fefca8..42b9c15f53 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -22,6 +22,7 @@
#include "qemu.h"
#include "cpu_loop-common.h"
#include "qemu/guest-random.h"
+#include "hw/semihosting/common-semi.h"
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
@@ -129,7 +130,7 @@ void cpu_loop(CPUARMState *env)
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
case EXCP_SEMIHOST:
- env->xregs[0] = do_arm_semihosting(env);
+ env->xregs[0] = do_common_semihosting(cs);
env->pc += 4;
break;
case EXCP_YIELD:
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index 3d272b56ef..cadfb7fa43 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -22,6 +22,7 @@
#include "qemu.h"
#include "elf.h"
#include "cpu_loop-common.h"
+#include "hw/semihosting/common-semi.h"
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
@@ -421,7 +422,7 @@ void cpu_loop(CPUARMState *env)
}
break;
case EXCP_SEMIHOST:
- env->regs[0] = do_arm_semihosting(env);
+ env->regs[0] = do_common_semihosting(cs);
env->regs[15] += env->thumb ? 2 : 4;
break;
case EXCP_INTERRUPT:
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8a492465d6..c5377e7ecb 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -34,6 +34,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
+#include "hw/semihosting/common-semi.h"
#endif
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
@@ -9875,13 +9876,13 @@ static void handle_semihosting(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%" PRIx64 "\n",
env->xregs[0]);
- env->xregs[0] = do_arm_semihosting(env);
+ env->xregs[0] = do_common_semihosting(cs);
env->pc += 4;
} else {
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
+ env->regs[0] = do_common_semihosting(cs);
env->regs[15] += env->thumb ? 2 : 4;
}
}
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 643dcafb83..6176003029 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -31,6 +31,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
+#include "hw/semihosting/common-semi.h"
#endif
static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
@@ -2306,7 +2307,11 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
- env->regs[0] = do_arm_semihosting(env);
+#ifdef CONFIG_TCG
+ env->regs[0] = do_common_semihosting(cs);
+#else
+ g_assert_not_reached();
+#endif
env->regs[15] += env->thumb ? 2 : 4;
return;
case EXCP_BKPT:
--
2.20.1
next prev parent reply other threads:[~2021-01-15 14:29 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 13:07 [PULL 00/30] testing, gdbstub and semihosting Alex Bennée
2021-01-15 13:07 ` [PULL 01/30] tests/docker: Remove Debian 9 remnant lines Alex Bennée
2021-01-15 13:08 ` [PULL 02/30] Makefile: add GNU global tags support Alex Bennée
2021-01-15 13:08 ` [PULL 03/30] shippable.yml: Remove jobs duplicated on Gitlab-CI Alex Bennée
2021-01-15 13:08 ` [PULL 04/30] Add newline when generating Dockerfile Alex Bennée
2021-01-15 13:08 ` [PULL 05/30] Makefile: wrap ctags in quiet-command calls Alex Bennée
2021-01-18 18:36 ` Philippe Mathieu-Daudé
2021-01-19 10:00 ` Alex Bennée
2021-01-19 14:24 ` Philippe Mathieu-Daudé
2021-01-19 14:27 ` Daniel P. Berrangé
2021-01-19 14:42 ` Philippe Mathieu-Daudé
2021-01-15 13:08 ` [PULL 06/30] Makefile: wrap etags " Alex Bennée
2021-01-15 13:08 ` [PULL 07/30] Makefile: wrap cscope " Alex Bennée
2021-01-15 13:08 ` [PULL 08/30] docker: expand debian-amd64 image to include tag tools Alex Bennée
2021-01-15 13:08 ` [PULL 09/30] gitlab: move docs and tools build across from Travis Alex Bennée
2021-01-15 13:08 ` [PULL 10/30] Fix build with new yank feature by adding stubs Alex Bennée
2021-01-15 13:08 ` [PULL 11/30] gitlab: migrate the minimal tools and unit tests from Travis Alex Bennée
2021-01-15 13:08 ` [PULL 12/30] scripts/checkpatch.pl: fix git-show invocation to include diffstat Alex Bennée
2021-01-15 13:08 ` [PULL 13/30] test/guest-debug: echo QEMU command as well Alex Bennée
2021-01-15 13:08 ` [PULL 14/30] configure: gate our use of GDB to 8.3.1 or above Alex Bennée
2021-01-15 13:08 ` [PULL 15/30] Revert "tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 test" Alex Bennée
2021-01-15 13:08 ` [PULL 16/30] gdbstub: implement a softmmu based test Alex Bennée
2021-01-15 13:08 ` [PULL 17/30] gdbstub: add support to Xfer:auxv:read: packet Alex Bennée
2021-01-15 13:08 ` [PULL 18/30] gdbstub: drop CPUEnv from gdb_exit() Alex Bennée
2021-01-15 13:08 ` [PULL 19/30] gdbstub: drop gdbserver_cleanup in favour of gdb_exit Alex Bennée
2021-01-15 13:08 ` [PULL 20/30] gdbstub: ensure we clean-up when terminated Alex Bennée
2021-01-15 13:08 ` [PULL 21/30] target/arm: use official org.gnu.gdb.aarch64.sve layout for registers Alex Bennée
2021-01-19 13:38 ` Claudio Fontana
2021-01-19 13:49 ` Claudio Fontana
2021-01-19 14:50 ` Alex Bennée
2021-01-19 15:11 ` Claudio Fontana
2021-01-19 15:54 ` Alex Bennée
2021-01-19 16:19 ` Luis Machado
2021-09-21 13:55 ` Peter Maydell
2021-10-04 18:44 ` Luis Machado
2021-11-04 21:03 ` Luis Machado
2021-11-05 13:35 ` Luis Machado
2021-11-05 16:15 ` Alex Bennée
2021-11-05 16:29 ` Luis Machado
2021-01-15 13:08 ` [PULL 22/30] semihosting: Move ARM semihosting code to shared directories Alex Bennée
2021-01-15 13:08 ` Alex Bennée [this message]
2021-01-15 13:08 ` [PULL 24/30] semihosting: Change internal common-semi interfaces to use CPUState * Alex Bennée
2021-02-17 15:02 ` Peter Maydell
2021-01-15 13:08 ` [PULL 25/30] semihosting: Support SYS_HEAPINFO when env->boot_info is not set Alex Bennée
2021-01-15 13:08 ` [PULL 26/30] riscv: Add semihosting support Alex Bennée
2021-01-15 13:08 ` [PULL 27/30] riscv: Add semihosting support for user mode Alex Bennée
2021-01-15 13:08 ` [PULL 28/30] semihosting: Implement SYS_ELAPSED and SYS_TICKFREQ Alex Bennée
2021-01-15 13:08 ` [PULL 29/30] semihosting: Implement SYS_TMPNAM Alex Bennée
2021-01-15 13:08 ` [PULL 30/30] semihosting: Implement SYS_ISERROR Alex Bennée
2021-01-15 15:31 ` [PULL 00/30] testing, gdbstub and semihosting Peter Maydell
2021-01-18 12:18 ` Alex Bennée
2021-01-18 13:33 ` Philippe Mathieu-Daudé
2021-01-18 15:38 ` Alex Bennée
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