From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [PATCH v3 16/21] linux-user/aarch64: Pass syndrome to EXC_*_ABORT
Date: Fri, 15 Jan 2021 12:46:40 -1000 [thread overview]
Message-ID: <20210115224645.1196742-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210115224645.1196742-1-richard.henderson@linaro.org>
A proper syndrome is required to fill in the proper si_code.
Use page_get_flags to determine permission vs translation for user-only.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
v3: Use syndrome.h, arm_deliver_fault.
---
linux-user/aarch64/cpu_loop.c | 24 +++++++++++++++++++++---
target/arm/tlb_helper.c | 15 +++++++++------
2 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index bbe9fefca8..7811440c68 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -22,6 +22,7 @@
#include "qemu.h"
#include "cpu_loop-common.h"
#include "qemu/guest-random.h"
+#include "target/arm/syndrome.h"
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
@@ -75,7 +76,7 @@
void cpu_loop(CPUARMState *env)
{
CPUState *cs = env_cpu(env);
- int trapnr;
+ int trapnr, ec, fsc;
abi_long ret;
target_siginfo_t info;
@@ -116,9 +117,26 @@ void cpu_loop(CPUARMState *env)
case EXCP_DATA_ABORT:
info.si_signo = TARGET_SIGSEGV;
info.si_errno = 0;
- /* XXX: check env->error_code */
- info.si_code = TARGET_SEGV_MAPERR;
info._sifields._sigfault._addr = env->exception.vaddress;
+
+ /* We should only arrive here with EC in {DATAABORT, INSNABORT}. */
+ ec = syn_get_ec(env->exception.syndrome);
+ assert(ec == EC_DATAABORT || ec == EC_INSNABORT);
+
+ /* Both EC have the same format for FSC, or close enough. */
+ fsc = extract32(env->exception.syndrome, 0, 6);
+ switch (fsc) {
+ case 0x04 ... 0x07: /* Translation fault, level {0-3} */
+ info.si_code = TARGET_SEGV_MAPERR;
+ break;
+ case 0x09 ... 0x0b: /* Access flag fault, level {1-3} */
+ case 0x0d ... 0x0f: /* Permission fault, level {1-3} */
+ info.si_code = TARGET_SEGV_ACCERR;
+ break;
+ default:
+ g_assert_not_reached();
+ }
+
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
case EXCP_DEBUG:
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index b35dc8a011..31015749fd 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -151,21 +151,24 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
bool probe, uintptr_t retaddr)
{
ARMCPU *cpu = ARM_CPU(cs);
+ ARMMMUFaultInfo fi = {};
#ifdef CONFIG_USER_ONLY
- cpu->env.exception.vaddress = address;
- if (access_type == MMU_INST_FETCH) {
- cs->exception_index = EXCP_PREFETCH_ABORT;
+ int flags = page_get_flags(useronly_clean_ptr(address));
+ if (flags & PAGE_VALID) {
+ fi.type = ARMFault_Permission;
} else {
- cs->exception_index = EXCP_DATA_ABORT;
+ fi.type = ARMFault_Translation;
}
- cpu_loop_exit_restore(cs, retaddr);
+
+ /* now we have a real cpu fault */
+ cpu_restore_state(cs, retaddr, true);
+ arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
#else
hwaddr phys_addr;
target_ulong page_size;
int prot, ret;
MemTxAttrs attrs = {};
- ARMMMUFaultInfo fi = {};
ARMCacheAttrs cacheattrs = {};
/*
--
2.25.1
next prev parent reply other threads:[~2021-01-15 23:02 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 22:46 [PATCH v3 00/21] target-arm: Implement ARMv8.5-MemTag, user mode Richard Henderson
2021-01-15 22:46 ` [PATCH v3 01/21] tcg: Introduce target-specific page data for user-only Richard Henderson
2021-01-19 16:53 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 02/21] linux-user: Introduce PAGE_ANON Richard Henderson
2021-01-15 22:46 ` [PATCH v3 03/21] exec: Use uintptr_t for guest_base Richard Henderson
2021-01-19 16:56 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 04/21] exec: Use uintptr_t in cpu_ldst.h Richard Henderson
2021-01-19 16:56 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 05/21] exec: Improve types for guest_addr_valid Richard Henderson
2021-01-19 16:57 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 06/21] linux-user: Check for overflow in access_ok Richard Henderson
2021-01-15 22:46 ` [PATCH v3 07/21] linux-user: Tidy VERIFY_READ/VERIFY_WRITE Richard Henderson
2021-01-15 22:46 ` [PATCH v3 08/21] bsd-user: " Richard Henderson
2021-01-16 16:28 ` Warner Losh
2021-01-15 22:46 ` [PATCH v3 09/21] linux-user: Do not use guest_addr_valid for h2g_valid Richard Henderson
2021-01-19 16:59 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 10/21] linux-user: Fix guest_addr_valid vs reserved_va Richard Henderson
2021-01-19 17:03 ` Peter Maydell
2021-01-19 17:41 ` Richard Henderson
2021-01-15 22:46 ` [PATCH v3 11/21] exec: Add support for TARGET_TAGGED_ADDRESSES Richard Henderson
2021-01-22 14:13 ` Peter Maydell
2021-01-26 17:10 ` Richard Henderson
2021-01-15 22:46 ` [PATCH v3 12/21] linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE Richard Henderson
2021-01-22 11:36 ` Peter Maydell
2021-01-22 11:53 ` Peter Maydell
2021-01-22 12:02 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 13/21] linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG Richard Henderson
2021-01-22 11:48 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 14/21] linux-user/aarch64: Implement PROT_MTE Richard Henderson
2021-01-15 22:46 ` [PATCH v3 15/21] target/arm: Split out syndrome.h from internals.h Richard Henderson
2021-01-19 17:07 ` Peter Maydell
2021-01-15 22:46 ` Richard Henderson [this message]
2021-01-19 17:12 ` [PATCH v3 16/21] linux-user/aarch64: Pass syndrome to EXC_*_ABORT Peter Maydell
2021-01-15 22:46 ` [PATCH v3 17/21] linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault Richard Henderson
2021-01-22 12:03 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 18/21] linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error Richard Henderson
2021-01-22 13:59 ` Peter Maydell
2021-01-28 8:49 ` Richard Henderson
2021-01-28 10:44 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 19/21] target/arm: Add allocation tag storage for user mode Richard Henderson
2021-01-22 14:05 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 20/21] target/arm: Enable MTE for user-only Richard Henderson
2021-01-22 14:02 ` Peter Maydell
2021-01-15 22:46 ` [PATCH v3 21/21] tests/tcg/aarch64: Add mte smoke tests Richard Henderson
2021-01-22 14:04 ` Peter Maydell
2021-01-15 23:15 ` [PATCH v3 00/21] target-arm: Implement ARMv8.5-MemTag, user mode no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210115224645.1196742-17-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).