From: Claudio Fontana <cfontana@suse.de>
To: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Roman Bolshakov <r.bolshakov@yadro.com>,
Claudio Fontana <cfontana@suse.de>,
Eduardo Habkost <ehabkost@redhat.com>,
qemu-devel@nongnu.org
Subject: [RFC v8 01/44] target/arm: move translate modules to tcg/
Date: Tue, 16 Mar 2021 19:36:19 +0100 [thread overview]
Message-ID: <20210316183702.10216-2-cfontana@suse.de> (raw)
In-Reply-To: <20210316183702.10216-1-cfontana@suse.de>
Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/a32-uncond.decode | 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/m-nocp.decode | 0
target/arm/{ => tcg}/neon-dp.decode | 0
target/arm/{ => tcg}/neon-ls.decode | 0
target/arm/{ => tcg}/neon-shared.decode | 0
target/arm/{ => tcg}/sve.decode | 0
target/arm/{ => tcg}/t16.decode | 0
target/arm/{ => tcg}/t32.decode | 0
target/arm/{ => tcg}/vfp-uncond.decode | 0
target/arm/{ => tcg}/vfp.decode | 0
target/arm/{ => tcg}/translate-a64.c | 0
target/arm/{ => tcg}/translate-sve.c | 0
target/arm/{ => tcg}/translate.c | 0
target/arm/{ => tcg}/translate-neon.c.inc | 0
target/arm/{ => tcg}/translate-vfp.c.inc | 0
target/arm/meson.build | 20 ++-----------------
target/arm/tcg/meson.build | 24 +++++++++++++++++++++++
20 files changed, 26 insertions(+), 18 deletions(-)
rename target/arm/{ => tcg}/translate-a64.h (100%)
rename target/arm/{ => tcg}/translate.h (100%)
rename target/arm/{ => tcg}/a32-uncond.decode (100%)
rename target/arm/{ => tcg}/a32.decode (100%)
rename target/arm/{ => tcg}/m-nocp.decode (100%)
rename target/arm/{ => tcg}/neon-dp.decode (100%)
rename target/arm/{ => tcg}/neon-ls.decode (100%)
rename target/arm/{ => tcg}/neon-shared.decode (100%)
rename target/arm/{ => tcg}/sve.decode (100%)
rename target/arm/{ => tcg}/t16.decode (100%)
rename target/arm/{ => tcg}/t32.decode (100%)
rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
rename target/arm/{ => tcg}/vfp.decode (100%)
rename target/arm/{ => tcg}/translate-a64.c (100%)
rename target/arm/{ => tcg}/translate-sve.c (100%)
rename target/arm/{ => tcg}/translate.c (100%)
rename target/arm/{ => tcg}/translate-neon.c.inc (100%)
rename target/arm/{ => tcg}/translate-vfp.c.inc (100%)
create mode 100644 target/arm/tcg/meson.build
diff --git a/target/arm/translate-a64.h b/target/arm/tcg/translate-a64.h
similarity index 100%
rename from target/arm/translate-a64.h
rename to target/arm/tcg/translate-a64.h
diff --git a/target/arm/translate.h b/target/arm/tcg/translate.h
similarity index 100%
rename from target/arm/translate.h
rename to target/arm/tcg/translate.h
diff --git a/target/arm/a32-uncond.decode b/target/arm/tcg/a32-uncond.decode
similarity index 100%
rename from target/arm/a32-uncond.decode
rename to target/arm/tcg/a32-uncond.decode
diff --git a/target/arm/a32.decode b/target/arm/tcg/a32.decode
similarity index 100%
rename from target/arm/a32.decode
rename to target/arm/tcg/a32.decode
diff --git a/target/arm/m-nocp.decode b/target/arm/tcg/m-nocp.decode
similarity index 100%
rename from target/arm/m-nocp.decode
rename to target/arm/tcg/m-nocp.decode
diff --git a/target/arm/neon-dp.decode b/target/arm/tcg/neon-dp.decode
similarity index 100%
rename from target/arm/neon-dp.decode
rename to target/arm/tcg/neon-dp.decode
diff --git a/target/arm/neon-ls.decode b/target/arm/tcg/neon-ls.decode
similarity index 100%
rename from target/arm/neon-ls.decode
rename to target/arm/tcg/neon-ls.decode
diff --git a/target/arm/neon-shared.decode b/target/arm/tcg/neon-shared.decode
similarity index 100%
rename from target/arm/neon-shared.decode
rename to target/arm/tcg/neon-shared.decode
diff --git a/target/arm/sve.decode b/target/arm/tcg/sve.decode
similarity index 100%
rename from target/arm/sve.decode
rename to target/arm/tcg/sve.decode
diff --git a/target/arm/t16.decode b/target/arm/tcg/t16.decode
similarity index 100%
rename from target/arm/t16.decode
rename to target/arm/tcg/t16.decode
diff --git a/target/arm/t32.decode b/target/arm/tcg/t32.decode
similarity index 100%
rename from target/arm/t32.decode
rename to target/arm/tcg/t32.decode
diff --git a/target/arm/vfp-uncond.decode b/target/arm/tcg/vfp-uncond.decode
similarity index 100%
rename from target/arm/vfp-uncond.decode
rename to target/arm/tcg/vfp-uncond.decode
diff --git a/target/arm/vfp.decode b/target/arm/tcg/vfp.decode
similarity index 100%
rename from target/arm/vfp.decode
rename to target/arm/tcg/vfp.decode
diff --git a/target/arm/translate-a64.c b/target/arm/tcg/translate-a64.c
similarity index 100%
rename from target/arm/translate-a64.c
rename to target/arm/tcg/translate-a64.c
diff --git a/target/arm/translate-sve.c b/target/arm/tcg/translate-sve.c
similarity index 100%
rename from target/arm/translate-sve.c
rename to target/arm/tcg/translate-sve.c
diff --git a/target/arm/translate.c b/target/arm/tcg/translate.c
similarity index 100%
rename from target/arm/translate.c
rename to target/arm/tcg/translate.c
diff --git a/target/arm/translate-neon.c.inc b/target/arm/tcg/translate-neon.c.inc
similarity index 100%
rename from target/arm/translate-neon.c.inc
rename to target/arm/tcg/translate-neon.c.inc
diff --git a/target/arm/translate-vfp.c.inc b/target/arm/tcg/translate-vfp.c.inc
similarity index 100%
rename from target/arm/translate-vfp.c.inc
rename to target/arm/tcg/translate-vfp.c.inc
diff --git a/target/arm/meson.build b/target/arm/meson.build
index a96af5ee1b..229ec7fa11 100644
--- a/target/arm/meson.build
+++ b/target/arm/meson.build
@@ -1,19 +1,4 @@
-gen = [
- decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
- decodetree.process('neon-shared.decode', extra_args: '--static-decode=disas_neon_shared'),
- decodetree.process('neon-dp.decode', extra_args: '--static-decode=disas_neon_dp'),
- decodetree.process('neon-ls.decode', extra_args: '--static-decode=disas_neon_ls'),
- decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
- decodetree.process('vfp-uncond.decode', extra_args: '--static-decode=disas_vfp_uncond'),
- decodetree.process('m-nocp.decode', extra_args: '--static-decode=disas_m_nocp'),
- decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
- decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
- decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
- decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
-]
-
arm_ss = ss.source_set()
-arm_ss.add(gen)
arm_ss.add(files(
'cpu.c',
'crypto_helper.c',
@@ -25,7 +10,6 @@ arm_ss.add(files(
'neon_helper.c',
'op_helper.c',
'tlb_helper.c',
- 'translate.c',
'vec_helper.c',
'vfp_helper.c',
'cpu_tcg.c',
@@ -41,8 +25,6 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
'mte_helper.c',
'pauth_helper.c',
'sve_helper.c',
- 'translate-a64.c',
- 'translate-sve.c',
))
arm_softmmu_ss = ss.source_set()
@@ -55,6 +37,8 @@ arm_softmmu_ss.add(files(
))
arm_user_ss = ss.source_set()
+subdir('tcg')
+
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}
target_user_arch += {'arm': arm_user_ss}
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
new file mode 100644
index 0000000000..5a7c9b95d8
--- /dev/null
+++ b/target/arm/tcg/meson.build
@@ -0,0 +1,24 @@
+gen = [
+ decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
+ decodetree.process('neon-shared.decode', extra_args: '--static-decode=disas_neon_shared'),
+ decodetree.process('neon-dp.decode', extra_args: '--static-decode=disas_neon_dp'),
+ decodetree.process('neon-ls.decode', extra_args: '--static-decode=disas_neon_ls'),
+ decodetree.process('vfp.decode', extra_args: '--static-decode=disas_vfp'),
+ decodetree.process('vfp-uncond.decode', extra_args: '--static-decode=disas_vfp_uncond'),
+ decodetree.process('m-nocp.decode', extra_args: '--static-decode=disas_m_nocp'),
+ decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
+ decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
+ decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
+ decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
+]
+
+arm_ss.add(gen)
+
+arm_ss.add(files(
+ 'translate.c',
+))
+
+arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
+ 'translate-a64.c',
+ 'translate-sve.c',
+))
--
2.26.2
next prev parent reply other threads:[~2021-03-16 19:01 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-16 18:36 [RFC v8 00/44] arm cleanup experiment for kvm-only build Claudio Fontana
2021-03-16 18:36 ` Claudio Fontana [this message]
2021-03-16 18:36 ` [RFC v8 02/44] target/arm: move helpers to tcg/ Claudio Fontana
2021-03-16 18:36 ` [RFC v8 03/44] arm: tcg: only build under CONFIG_TCG Claudio Fontana
2021-03-16 18:36 ` [RFC v8 04/44] target/arm: tcg: add sysemu and user subsirs Claudio Fontana
2021-03-16 18:36 ` [RFC v8 05/44] target/arm: only build psci for TCG Claudio Fontana
2021-03-16 18:36 ` [RFC v8 06/44] target/arm: split off cpu-sysemu.c Claudio Fontana
2021-03-16 18:36 ` [RFC v8 07/44] target/arm: move physical address translation to cpu-mmu Claudio Fontana
2021-03-16 18:36 ` [RFC v8 08/44] target/arm: cpu-mmu: fix comment style Claudio Fontana
2021-03-16 18:36 ` [RFC v8 09/44] target/arm: split cpregs from tcg/helper.c Claudio Fontana
2021-03-16 18:36 ` [RFC v8 10/44] target/arm: cpregs: fix style (mostly just comments) Claudio Fontana
2021-03-16 18:36 ` [RFC v8 11/44] target/arm: move cpu definitions to common cpu module Claudio Fontana
2021-03-16 18:36 ` [RFC v8 12/44] target/arm: only perform TCG cpu and machine inits if TCG enabled Claudio Fontana
2021-03-16 18:36 ` [RFC v8 13/44] target/arm: kvm: add stubs for some helpers Claudio Fontana
2021-03-16 18:36 ` [RFC v8 14/44] target/arm: move cpsr_read, cpsr_write to cpu_common Claudio Fontana
2021-03-16 18:36 ` [RFC v8 15/44] target/arm: add temporary stub for arm_rebuild_hflags Claudio Fontana
2021-03-16 18:36 ` [RFC v8 16/44] target/arm: split vfp state setting from tcg helpers Claudio Fontana
2021-03-16 18:36 ` [RFC v8 17/44] target/arm: move arm_mmu_idx* to cpu-mmu Claudio Fontana
2021-03-16 18:36 ` [RFC v8 18/44] target/arm: move sve_zcr_len_for_el to common_cpu Claudio Fontana
2021-03-16 18:36 ` [RFC v8 19/44] target/arm: move arm_sctlr away from tcg helpers Claudio Fontana
2021-03-16 18:36 ` [RFC v8 20/44] target/arm: move arm_cpu_list to common_cpu Claudio Fontana
2021-03-16 18:36 ` [RFC v8 21/44] target/arm: move aarch64_sync_32_to_64 (and vv) to cpu code Claudio Fontana
2021-03-16 18:36 ` [RFC v8 22/44] target/arm: split a15 cpu model and 32bit class functions to cpu32.c Claudio Fontana
2021-03-16 18:36 ` [RFC v8 23/44] target/arm: move sve_exception_el out of TCG helpers Claudio Fontana
2021-03-16 18:36 ` [RFC v8 24/44] target/arm: refactor exception and cpu code Claudio Fontana
2021-03-16 18:36 ` [RFC v8 25/44] target/arm: cpu: fix style Claudio Fontana
2021-03-16 18:36 ` [RFC v8 26/44] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled() Claudio Fontana
2021-03-16 18:36 ` [RFC v8 27/44] target/arm: remove kvm include file for PSCI and arm-powerctl Claudio Fontana
2021-03-16 18:36 ` [RFC v8 28/44] target/arm: move kvm-const.h, kvm.c, kvm64.c, kvm_arm.h to kvm/ Claudio Fontana
2021-03-16 18:36 ` [RFC v8 29/44] target/arm: cleanup cpu includes Claudio Fontana
2021-03-16 18:36 ` [RFC v8 30/44] target/arm: remove broad "else" statements when checking accels Claudio Fontana
2021-03-16 18:36 ` [RFC v8 31/44] tests/qtest: skip bios-tables-test test_acpi_oem_fields_virt for KVM Claudio Fontana
2021-03-16 18:36 ` [RFC v8 32/44] tests: restrict TCG-only arm-cpu-features tests to TCG builds Claudio Fontana
2021-03-16 18:36 ` [RFC v8 33/44] tests: do not run test-hmp on all machines for ARM KVM-only Claudio Fontana
2021-03-16 18:36 ` [RFC v8 34/44] tests: device-introspect-test: cope with ARM TCG-only devices Claudio Fontana
2021-03-16 18:36 ` [RFC v8 35/44] tests: do not run qom-test on all machines for ARM KVM-only Claudio Fontana
2021-03-16 18:36 ` [RFC v8 36/44] Revert "target/arm: Restrict v8M IDAU to TCG" Claudio Fontana
2021-03-16 18:36 ` [RFC v8 37/44] target/arm: create kvm cpu accel class Claudio Fontana
2021-03-16 18:36 ` [RFC v8 38/44] target/arm: move kvm cpu properties setting to kvm-cpu Claudio Fontana
2021-03-16 18:36 ` [RFC v8 39/44] accel: move call to accel_init_interfaces Claudio Fontana
2021-03-16 18:36 ` [RFC v8 40/44] accel: add double dispatch mechanism for class initialization Claudio Fontana
2021-03-16 18:36 ` [RFC v8 41/44] target/arm: add tcg cpu accel class Claudio Fontana
2021-03-16 18:37 ` [RFC v8 42/44] target/arm: move TCG gt timer creation code in tcg/ Claudio Fontana
2021-03-16 18:37 ` [RFC v8 43/44] target/arm: cpu-sve: new module Claudio Fontana
2021-03-16 18:37 ` [RFC v8 44/44] target/arm: cpu-sve: split TCG and KVM functionality Claudio Fontana
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