From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v3 04/30] target/mips: Make CPU/FPU regnames[] arrays global
Date: Mon, 19 Apr 2021 21:17:57 +0200 [thread overview]
Message-ID: <20210419191823.1555482-5-f4bug@amsat.org> (raw)
In-Reply-To: <20210419191823.1555482-1-f4bug@amsat.org>
The CPU/FPU regnames[] arrays is used in mips_tcg_init() and
mips_cpu_dump_state(), which while being in translate.c is
not specific to TCG.
To be able to move mips_cpu_dump_state() to cpu.c, which is
compiled for all accelerator, we need to make the regnames[]
arrays global to target/mips/ by declaring them in "internal.h".
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/internal.h | 3 +++
target/mips/cpu.c | 7 +++++++
target/mips/fpu.c | 7 +++++++
target/mips/translate.c | 14 --------------
4 files changed, 17 insertions(+), 14 deletions(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
index 99264b8bf6a..a8644f754a6 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -71,6 +71,9 @@ struct mips_def_t {
int32_t SAARP;
};
+extern const char * const regnames[32];
+extern const char * const fregnames[32];
+
extern const struct mips_def_t mips_defs[];
extern const int mips_defs_number;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index dce1e166bde..f354d18aec4 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -35,6 +35,13 @@
#include "qapi/qapi-commands-machine-target.h"
#include "fpu_helper.h"
+const char * const regnames[32] = {
+ "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
+ "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
+ "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+ "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
+};
+
#if !defined(CONFIG_USER_ONLY)
/* Called for updates to CP0_Status. */
diff --git a/target/mips/fpu.c b/target/mips/fpu.c
index 39a2f7fd22e..1447dba3fa3 100644
--- a/target/mips/fpu.c
+++ b/target/mips/fpu.c
@@ -16,3 +16,10 @@ const FloatRoundMode ieee_rm[4] = {
float_round_up,
float_round_down
};
+
+const char * const fregnames[32] = {
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
+};
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 71fa5ec1973..f99d4d4016d 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1267,13 +1267,6 @@ TCGv_i64 fpu_f64[32];
#define DISAS_STOP DISAS_TARGET_0
#define DISAS_EXIT DISAS_TARGET_1
-static const char * const regnames[] = {
- "r0", "at", "v0", "v1", "a0", "a1", "a2", "a3",
- "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
- "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
- "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra",
-};
-
static const char * const regnames_HI[] = {
"HI0", "HI1", "HI2", "HI3",
};
@@ -1282,13 +1275,6 @@ static const char * const regnames_LO[] = {
"LO0", "LO1", "LO2", "LO3",
};
-static const char * const fregnames[] = {
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
-};
-
/* General purpose registers moves. */
void gen_load_gpr(TCGv t, int reg)
{
--
2.26.3
next prev parent reply other threads:[~2021-04-19 19:26 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-19 19:17 [PATCH v3 00/30] target/mips: Re-org to allow KVM-only builds Philippe Mathieu-Daudé
2021-04-19 19:17 ` [PATCH v3 01/30] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-04-19 19:17 ` [PATCH v3 02/30] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-04-19 19:17 ` [PATCH v3 03/30] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-04-19 19:17 ` Philippe Mathieu-Daudé [this message]
2021-04-19 19:17 ` [PATCH v3 05/30] target/mips: Optimize CPU/FPU regnames[] arrays Philippe Mathieu-Daudé
2021-04-19 19:22 ` Richard Henderson
2021-04-19 19:17 ` [PATCH v3 06/30] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 07/30] target/mips: Turn printfpr() macro into a proper function Philippe Mathieu-Daudé
2021-04-19 19:24 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 08/30] target/mips: Declare mips_cpu_set_error_pc() inlined in "internal.h" Philippe Mathieu-Daudé
2021-04-19 19:27 ` Richard Henderson
2021-04-19 20:42 ` Philippe Mathieu-Daudé
2021-04-20 14:03 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 09/30] target/mips: Merge do_translate_address into cpu_mips_translate_address Philippe Mathieu-Daudé
2021-04-19 19:31 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 10/30] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 11/30] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 12/30] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 13/30] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 14/30] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 15/30] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 16/30] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 17/30] target/mips: Move physical addressing code to sysemu/physaddr.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 18/30] target/mips: Restrict cpu_mips_get_random() / update_pagemask() to TCG Philippe Mathieu-Daudé
2021-04-19 19:33 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 19/30] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-19 19:34 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 20/30] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 21/30] target/mips: Move tlb_helper.c to tcg/sysemu/ Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 22/30] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 23/30] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 24/30] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-04-19 20:14 ` Richard Henderson
2021-04-19 19:18 ` [PATCH v3 25/30] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 26/30] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 27/30] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 28/30] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 29/30] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-04-19 19:18 ` [PATCH v3 30/30] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-04-19 19:33 ` [PATCH v3 00/30] target/mips: Re-org to allow KVM-only builds no-reply
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210419191823.1555482-5-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=aleksandar.rikalo@syrmia.com \
--cc=aurelien@aurel32.net \
--cc=chenhuacai@kernel.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).