From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liweiwei@iscas.ac.cn,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: [PATCH v9 00/11] target/riscv: rework CPU extension validation
Date: Wed, 17 May 2023 10:57:03 -0300 [thread overview]
Message-ID: <20230517135714.211809-1-dbarboza@ventanamicro.com> (raw)
Hi,
In this version we have a change in patch 11. We're now firing a
GUEST_ERROR if write_misa() fails and we need to rollback (i.e. not
change MISA ext).
No other changes made.
Changes from v8:
- patch 11:
- log a GUEST_ERROR if we decided to keep the current env->misa_ext
value because the user value failed our validation
- v8 link: https://lists.gnu.org/archive/html/qemu-devel/2023-04/msg03584.html
Daniel Henrique Barboza (9):
target/riscv/cpu.c: add riscv_cpu_validate_v()
target/riscv/cpu.c: remove set_vext_version()
target/riscv/cpu.c: remove set_priv_version()
target/riscv: add PRIV_VERSION_LATEST
target/riscv/cpu.c: add priv_spec validate/disable_exts helpers
target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl()
target/riscv/cpu.c: validate extensions before riscv_timer_init()
target/riscv/cpu.c: remove cfg setup from riscv_cpu_init()
target/riscv: rework write_misa()
Weiwei Li (2):
target/riscv: Mask the implicitly enabled extensions in isa_string
based on priv version
target/riscv: Update check for Zca/Zcf/Zcd
target/riscv/cpu.c | 333 ++++++++++++++----------
target/riscv/cpu.h | 3 +
target/riscv/csr.c | 51 ++--
target/riscv/insn_trans/trans_rvd.c.inc | 12 +-
target/riscv/insn_trans/trans_rvf.c.inc | 14 +-
target/riscv/insn_trans/trans_rvi.c.inc | 5 +-
target/riscv/translate.c | 5 +-
7 files changed, 248 insertions(+), 175 deletions(-)
--
2.40.1
next reply other threads:[~2023-05-17 13:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-17 13:57 Daniel Henrique Barboza [this message]
2023-05-17 13:57 ` [PATCH v9 01/11] target/riscv/cpu.c: add riscv_cpu_validate_v() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 02/11] target/riscv/cpu.c: remove set_vext_version() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 03/11] target/riscv/cpu.c: remove set_priv_version() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 04/11] target/riscv: add PRIV_VERSION_LATEST Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 05/11] target/riscv: Mask the implicitly enabled extensions in isa_string based on priv version Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 06/11] target/riscv: Update check for Zca/Zcf/Zcd Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 07/11] target/riscv/cpu.c: add priv_spec validate/disable_exts helpers Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 08/11] target/riscv/cpu.c: add riscv_cpu_validate_misa_mxl() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 09/11] target/riscv/cpu.c: validate extensions before riscv_timer_init() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 10/11] target/riscv/cpu.c: remove cfg setup from riscv_cpu_init() Daniel Henrique Barboza
2023-05-17 13:57 ` [PATCH v9 11/11] target/riscv: rework write_misa() Daniel Henrique Barboza
2023-05-18 4:49 ` Alistair Francis
2023-05-18 9:45 ` [PATCH v9 00/11] target/riscv: rework CPU extension validation Alistair Francis
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