From: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Richard Henderson" <richard.henderson@linaro.org>,
qemu-devel <qemu-devel@nongnu.org>
Cc: "qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
Alistair Francis <Alistair.Francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
liweiwei <liweiwei@iscas.ac.cn>,
LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: riscv kvm breakage
Date: Tue, 11 Jul 2023 14:02:43 -0300 [thread overview]
Message-ID: <2405d7a7-5243-2883-9e9b-e764c95471c0@ventanamicro.com> (raw)
In-Reply-To: <7b35a2ab-548e-8eb5-cd09-5a2e12d93453@linaro.org>
On 7/11/23 13:47, Philippe Mathieu-Daudé wrote:
> On 11/7/23 18:43, Richard Henderson wrote:
>> Hiya,
>>
>> This breakage crept in while cross-riscv64-system was otherwise broken in configure:
>>
>> https://gitlab.com/qemu-project/qemu/-/jobs/4633277557#L4165
>>
>> ../target/riscv/kvm.c:209:38: error: ‘KVM_RISCV_ISA_EXT_ZICBOZ’ undeclared here (not in a function); did you mean ‘KVM_RISCV_ISA_EXT_ZICBOM’?
>> 209 | KVM_EXT_CFG("zicboz", ext_icboz, KVM_RISCV_ISA_EXT_ZICBOZ),
>> | ^~~~~~~~~~~~~~~~~~~~~~~~
>> ../target/riscv/kvm.c:205:20: note: in definition of macro ‘KVM_EXT_CFG’
>> 205 | .kvm_reg_id = _reg_id}
>> | ^~~~~~~
>> ../target/riscv/kvm.c:211:33: error: ‘KVM_RISCV_ISA_EXT_ZBB’ undeclared here (not in a function); did you mean ‘KVM_RISCV_ISA_EXT_MAX’?
>> 211 | KVM_EXT_CFG("zbb", ext_zbb, KVM_RISCV_ISA_EXT_ZBB),
>> | ^~~~~~~~~~~~~~~~~~~~~
>> ../target/riscv/kvm.c:205:20: note: in definition of macro ‘KVM_EXT_CFG’
>> 205 | .kvm_reg_id = _reg_id}
>> | ^~~~~~~
>> ../target/riscv/kvm.c:212:37: error: ‘KVM_RISCV_ISA_EXT_SSAIA’ undeclared here (not in a function); did you mean ‘KVM_RISCV_ISA_EXT_SSTC’?
>> 212 | KVM_EXT_CFG("ssaia", ext_ssaia, KVM_RISCV_ISA_EXT_SSAIA),
>> | ^~~~~~~~~~~~~~~~~~~~~~~
>> ../target/riscv/kvm.c:205:20: note: in definition of macro ‘KVM_EXT_CFG’
>> 205 | .kvm_reg_id = _reg_id}
>> | ^~~~~~~
>> In file included from /usr/riscv64-linux-gnu/include/rpc/netdb.h:42,
>> from /usr/riscv64-linux-gnu/include/netdb.h:32,
>> from /builds/qemu-project/qemu/include/sysemu/os-posix.h:34,
>> from /builds/qemu-project/qemu/include/qemu/osdep.h:151,
>> from ../target/riscv/kvm.c:19:
>> ../target/riscv/kvm.c:288:44: error: ‘struct kvm_riscv_config’ has no member named ‘zicboz_block_size’; did you mean ‘zicbom_block_size’?
>> 288 | .kvm_reg_id = KVM_REG_RISCV_CONFIG_REG(zicboz_block_size)
>> | ^~~~~~~~~~~~~~~~~
>>
>> Can someone have a look asap? Thanks,
>
> See:
> https://lore.kernel.org/qemu-devel/20230711163346.69409-1-philmd@linaro.org/
Thanks Phil!
ps: cross building stuff is hard ....
>
> :)
next prev parent reply other threads:[~2023-07-11 17:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-11 16:43 riscv kvm breakage Richard Henderson
2023-07-11 16:47 ` Philippe Mathieu-Daudé
2023-07-11 17:02 ` Daniel Henrique Barboza [this message]
2023-07-11 16:49 ` Palmer Dabbelt
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