On 16 February 2016 at 21:47, Jean-Christophe DUBOIS
<jcd@tribudubois.net> wrote:

In QEMU, other Cortex A9 (Versatilepb.c, Exynos, Zynq ...) are also setting
has_el3 to false ...

So these generally are the "legacy" platforms which were
added before we ever had EL3 support in QEMU. For them it's hard
to turn the EL3 support on for the board even if in theory
it ought to be on, because we don't know what users are
running on it that we might break. With a new to QEMU board
we have an opportunity to get it right from the start.

-kernel I would expect to work, though, at least if the
only issue is the interrupt controller setup. It seems
worth investigating why it goes wrong.

• gic_dist_writeb: Bad offset 38x (a few at startup)
  
• Ignoring attempt to switch CPSR_A flag from non-secure world with SCR.AW bit clear (a lot)
  
• Ignoring attempt to switch CPSR_F flag from non-secure world with SCR.FW bit clear (a few)
  

I am not sure if this is a problem. Do you have some opinion on this?

thanks
-- PMM