From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: Luc Michel <luc@lmichel.fr>, qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Havard Skinnemoen <hskinnemoen@google.com>,
Andrew Baumann <Andrew.Baumann@microsoft.com>,
Paul Zimmerman <pauldzim@gmail.com>,
Niek Linnenbank <nieklinnenbank@gmail.com>,
qemu-arm@nongnu.org
Subject: Re: [PATCH v3 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour
Date: Sat, 10 Oct 2020 17:52:56 +0200 [thread overview]
Message-ID: <6982aced-ca14-73bf-48ff-7f739f2c389a@amsat.org> (raw)
In-Reply-To: <20201010135759.437903-12-luc@lmichel.fr>
On 10/10/20 3:57 PM, Luc Michel wrote:
> A clock mux can be configured to select one of its 10 sources through
> the CM_CTL register. It also embeds yet another clock divider, composed
> of an integer part and a fractional part. The number of bits of each
> part is mux dependent.
>
> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Luc Michel <luc@lmichel.fr>
> ---
> hw/misc/bcm2835_cprman.c | 53 +++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> index b22170f3bc..919a55aa23 100644
> --- a/hw/misc/bcm2835_cprman.c
> +++ b/hw/misc/bcm2835_cprman.c
> @@ -229,19 +229,70 @@ static const TypeInfo cprman_pll_channel_info = {
> };
>
>
> /* clock mux */
>
> +static bool clock_mux_is_enabled(CprmanClockMuxState *mux)
> +{
> + return FIELD_EX32(*mux->reg_ctl, CM_CLOCKx_CTL, ENABLE);
> +}
> +
> static void clock_mux_update(CprmanClockMuxState *mux)
> {
> - clock_update(mux->out, 0);
> + uint64_t freq;
> + uint32_t div, src = FIELD_EX32(*mux->reg_ctl, CM_CLOCKx_CTL, SRC);
> + bool enabled = clock_mux_is_enabled(mux);
> +
> + *mux->reg_ctl = FIELD_DP32(*mux->reg_ctl, CM_CLOCKx_CTL, BUSY, enabled);
> +
> + if (!enabled) {
> + clock_update(mux->out, 0);
> + return;
> + }
> +
> + freq = clock_get_hz(mux->srcs[src]);
> +
> + if (mux->int_bits == 0 && mux->frac_bits == 0) {
> + clock_update_hz(mux->out, freq);
> + return;
> + }
> +
> + /*
> + * The divider has an integer and a fractional part. The size of each part
> + * varies with the muxes (int_bits and frac_bits). Both parts are
> + * concatenated, with the integer part always starting at bit 12.
> + *
> + * 31 12 11 0
> + * ------------------------------
> + * CM_DIV | | int | frac | |
> + * ------------------------------
> + * <-----> <------>
> + * int_bits frac_bits
> + */
> + div = extract32(*mux->reg_div,
> + R_CM_CLOCKx_DIV_FRAC_LENGTH - mux->frac_bits,
> + mux->int_bits + mux->frac_bits);
> +
> + if (!div) {
> + clock_update(mux->out, 0);
> + return;
> + }
> +
> + freq = muldiv64(freq, 1 << mux->frac_bits, div);
> +
> + clock_update_hz(mux->out, freq);
> }
Much nicer now, thanks :)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
> static void clock_mux_src_update(void *opaque)
> {
> CprmanClockMuxState **backref = opaque;
> CprmanClockMuxState *s = *backref;
> + CprmanClockMuxSource src = backref - s->backref;
> +
> + if (FIELD_EX32(*s->reg_ctl, CM_CLOCKx_CTL, SRC) != src) {
> + return;
> + }
>
> clock_mux_update(s);
> }
>
> static void clock_mux_init(Object *obj)
>
next prev parent reply other threads:[~2020-10-10 15:54 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-10 13:57 [PATCH v3 00/15] raspi: add the bcm2835 cprman clock manager Luc Michel
2020-10-10 13:57 ` [PATCH v3 01/15] hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro Luc Michel
2020-10-10 13:57 ` [PATCH v3 02/15] hw/core/clock: trace clock values in Hz instead of ns Luc Michel
2020-10-10 15:48 ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 03/15] hw/core/clock: add the clock_new helper function Luc Michel
2020-10-10 15:17 ` Philippe Mathieu-Daudé
2020-10-10 15:44 ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 04/15] hw/arm/raspi: fix CPRMAN base address Luc Michel
2020-10-10 13:57 ` [PATCH v3 05/15] hw/arm/raspi: add a skeleton implementation of the CPRMAN Luc Michel
2020-10-10 13:57 ` [PATCH v3 06/15] hw/misc/bcm2835_cprman: add a PLL skeleton implementation Luc Michel
2020-10-10 13:57 ` [PATCH v3 07/15] hw/misc/bcm2835_cprman: implement PLLs behaviour Luc Michel
2020-10-10 13:57 ` [PATCH v3 08/15] hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation Luc Michel
2020-10-10 16:05 ` Philippe Mathieu-Daudé
2020-10-17 10:00 ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 09/15] hw/misc/bcm2835_cprman: implement PLL channels behaviour Luc Michel
2020-10-10 13:57 ` [PATCH v3 10/15] hw/misc/bcm2835_cprman: add a clock mux skeleton implementation Luc Michel
2020-10-10 13:57 ` [PATCH v3 11/15] hw/misc/bcm2835_cprman: implement clock mux behaviour Luc Michel
2020-10-10 15:52 ` Philippe Mathieu-Daudé [this message]
2020-10-10 13:57 ` [PATCH v3 12/15] hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer Luc Michel
2020-10-10 13:57 ` [PATCH v3 13/15] hw/misc/bcm2835_cprman: add sane reset values to the registers Luc Michel
2020-10-10 16:18 ` Philippe Mathieu-Daudé
2020-10-11 18:26 ` Luc Michel
2020-10-16 17:10 ` Philippe Mathieu-Daudé
2020-10-19 15:44 ` Philippe Mathieu-Daudé
2020-10-10 13:57 ` [PATCH v3 14/15] hw/char/pl011: add a clock input Luc Michel
2020-10-10 13:57 ` [PATCH v3 15/15] hw/arm/bcm2835_peripherals: connect the UART clock Luc Michel
2020-10-16 17:11 ` [PATCH v3 00/15] raspi: add the bcm2835 cprman clock manager Philippe Mathieu-Daudé
2020-10-19 15:45 ` Peter Maydell
2020-10-19 19:31 ` Peter Maydell
2020-10-27 8:55 ` Philippe Mathieu-Daudé
2020-10-27 11:11 ` Peter Maydell
2020-10-22 22:06 ` Philippe Mathieu-Daudé
2020-10-22 22:48 ` Guenter Roeck
2020-10-23 3:55 ` Guenter Roeck
2020-10-23 11:13 ` Philippe Mathieu-Daudé
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