From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <alistair23@gmail.com>
Subject: Re: [PATCH v2 4/4] hw/riscv: Load the kernel after the firmware
Date: Tue, 20 Oct 2020 11:17:53 +0800 [thread overview]
Message-ID: <CAEUhbmVFFABiR-kde_OGxJp9=fPwvvBnNcbOA8hXpS_-vSqpUQ@mail.gmail.com> (raw)
In-Reply-To: <46c00c4f15b42feb792090e3d74359e180a6d954.1602634524.git.alistair.francis@wdc.com>
On Wed, Oct 14, 2020 at 8:28 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> Instead of loading the kernel at a hardcoded start address, let's load
> the kernel at the next alligned address after the end of the firmware.
typo of "aligned"
>
> This should have no impact for current users of OpenSBI, but will
> allow loading a noMMU kernel at the start of memory.
>
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> include/hw/riscv/boot.h | 3 +++
> hw/riscv/boot.c | 19 ++++++++++++++-----
> hw/riscv/opentitan.c | 3 ++-
> hw/riscv/sifive_e.c | 3 ++-
> hw/riscv/sifive_u.c | 10 ++++++++--
> hw/riscv/spike.c | 11 ++++++++---
> hw/riscv/virt.c | 11 ++++++++---
> 7 files changed, 45 insertions(+), 15 deletions(-)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
next prev parent reply other threads:[~2020-10-20 3:25 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 0:17 [PATCH v2 0/4] Allow loading a no MMU kernel Alistair Francis
2020-10-14 0:17 ` [PATCH v2 1/4] hw/riscv: sifive_u: Allow specifying the CPU Alistair Francis
2020-10-19 23:17 ` Palmer Dabbelt
2020-10-20 3:17 ` Bin Meng
2020-10-14 0:17 ` [PATCH v2 2/4] hw/riscv: Return the end address of the loaded firmware Alistair Francis
2020-10-19 23:17 ` Palmer Dabbelt
2020-10-20 3:17 ` Bin Meng
2020-10-14 0:17 ` [PATCH v2 3/4] hw/riscv: Add a riscv_is_32_bit() function Alistair Francis
2020-10-19 23:17 ` Palmer Dabbelt
2020-10-20 3:17 ` Bin Meng
2020-10-14 0:17 ` [PATCH v2 4/4] hw/riscv: Load the kernel after the firmware Alistair Francis
2020-10-19 23:17 ` Palmer Dabbelt
2020-10-20 15:46 ` Alistair Francis
2020-11-06 2:48 ` Palmer Dabbelt
2020-11-06 4:15 ` Anup Patel
2020-11-09 23:19 ` Alistair Francis
2020-10-20 3:17 ` Bin Meng [this message]
2020-10-20 15:44 ` [PATCH v2 0/4] Allow loading a no MMU kernel Alistair Francis
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