Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)

[Aleksandar Markovic <aleksandar.m.mail@gmail.com>]

30.08.2019. 11.14, "Libo Zhou" <zhlb29@foxmail.com> је написао/ла:
>
> Hi Aleksandar,
>
> Thanks for explaining helper functions for me. Before getting my hands
dirty, I have some more questions. After figuring them out, I can get
started.
>
> I need to add some new registers to the CPU. In "translate.c", I found
that the registers are declared as static TCGv array (e.g. cpu_gpr[32]).
Then, in function mips_tcg_init(), cpu_gpr[i] is created one by one with
tcg_global_mem_new(...) in a for loop. Is that all I need to do to add new
registers to the CPU? I noticed another file "cpu.h", do I also need to add
my new registers, say, "my_gpr[32]" in "cpu.h"?
>
> My new instructions also include some load & stores. I see I can
implement them with tcg_gen_qemu_ld/st_tl(...) in the decode function's
switch-case statements, but I don't see how the *target* memory is created.
Shouldn't they be created with tcg_global_mem_new(...), just like how the
registers are created? I can hack the memory by creating a *super* larger
register file, and hack the loads & stores with register moves, but that
just sounds too sketchy.
>

For register definition, load/store instruction, take a look at details of
this series:

https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg06028.html

Don't mix register and memory initialization. For memory, the existing code
should bu sufficient.

What you need to additionally do (and you didn't mention it) is to define a
CPU that will have some base instruction set (it coukd be, for example,
mips32r2) + your additional instructions. This is done in file by adding a
corresponding item in translate_init.inc.c (if you choise mips32r2 as base
ISA, you could base your new CPU on existing CPU 24Kf). And then you start
QEMU with switch "-cpu <your newly defined CPU>".

I may add more explanation later on.

> On the other hand, I would like to get it running first, without doing
any modification to the source code. I can build the user space emulation
on Linux.
>
> ./configure --target-list=mips-linux-user
>
> Then I will write a testprogram.c, cross compile it on x86 into MIPS
using gcc(I am not clear on how to do it, but my team has the compiler for
our new ISA, I just want to try the MIPS version first), and run the test
program.
>
> ./qemu testprogram
>
> How do I look at the contents in the target registers and memory? I saw
that function "mips_cpu_dump_state" in "translate.c" does what I need, but
I don't know how to call it in this process. Should I use gdb?
>
> I am really sorry for asking you so many questions, but I think after
getting them figured out, I can start my project. Thank you very much in
advance, and have a good weekend!
>

The questions are always fine and welcome, just we are typically very busy,
snd can't always promptly replay.

Aleksandae

> Cheers,
> Libo
>
>
> ------------------ Original ------------------
> From:  "Aleksandar Markovic";<aleksandar.m.mail@gmail.com>;
> Send time: Thursday, Aug 29, 2019 10:22 PM
> To: "Libo Zhou"<zhlb29@foxmail.com>;
> Cc: "qemu-devel"<qemu-devel@nongnu.org>;
> Subject:  Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
>
> On Wed, Aug 28, 2019 at 5:54 AM Libo Zhou <zhlb29@foxmail.com> wrote:
>
> > Hi Aleksandar,
> >
> > Thank you for the link to Loongson2F documentation. It has been very
> > useful:)
> >
> > I have spent several days immersing myself in the source code, now I
think
> > I have a more solid understanding about it. Just like Loongson
Multimedia
> > Instructions, I need to implement some sort of complex vector
instructions,
> > and I need to write some helper functions (e.g. my_helper.c).
> >
> > The QEMU wiki website has very thorough explanation on TCG, but I
haven't
> > found any explanation on the port-specific helpers. Is there any
> > documentation on how the helper functions are generated? I think now I
> > *might* know how to write a working helper function, but I just don't
know
> > how it works.
> >
> >
> Hello, Libo,
>
> Prerequisite for writing a helper is that you have a clear definition of
> new instruction functionality, in the sense, what operation is done on
what
> resources. "Resources" are registers - they could be general-purpose MIPS
> registers, or some special additional registers. Did you use existing
> registers, or did you define a new set or registers for your new
> instructions? Registers are modeled as fields in a structure, and both
> helpers and TCG implementations modify those fields while performing
> instruction emulation.
>
> In any case, you pass to the helper all information needed for the
> instruction in question to perform. These are usually ordinal numbers of
> involved register, derived from decoding the opcode. Alternatively, you
can
> pass pointers to the registers, rather than ordinal numbers. In turn, the
> main part of functionality is implemented. At the end of helper, you may
> want to update, let's say, a status register, if any (depending on your
> design).
>
> The declaration of helpers is a little contrived, and may still confuse
> you. But this is not crucial to you. I advise you just to copy a solution
> for a similar existing instruction.
>
> Yours,
> Aleksandar
>
>
>
> > Cheers,
> > Libo
> >
> >
> >
> >
> > ------------------ Original message ------------------
> > *From:* "Aleksandar Markovic";
> > *Sendtime:* Thursday, Aug 22, 2019 6:53 PM
> > *To:* "Libo Zhou";
> > *Cc:* "qemu-devel";
> > *Subject:* Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
> >
> > On Thu, Aug 22, 2019 at 12:24 PM 立 <zhlb29@foxmail.com> wrote:
> >
> > > Hi Aleksandar,
> > >
> > > Thank you very much for your patient explanation in the previous post.
> > And
> > > thank you for checking.
> > > Your and Peter's replies in the previous post certainly helped a lot.
I
> > am
> > > now looking at a git commit 7 years ago (
> > > bd277fa1966bc400f1b411f868f39125cda0c403), it was a Loongson
Multimedia
> > > Instruction implementation done my Richard Henderson.
> > >
> >
> > Cool, that commit is a very good staring point - it is definitely not
too
> > simple, and it is not too complex either. And you can discover several
> > different concepts in the process of exploring the change.
> >
> > Documentation on instruction set extension related to the commit (found
by
> > Google):
> > https://files.somniafabularum.com/loongson/docs/Loongson2FUserGuide.pdf
> >
> > Be persistent, take your time, study the details and handling of
individual
> > instructions, and, of course, let us know if you encounter some major
> > obstacles or thorny dilemmas.
> >
> > Yours,
> > Aleksandar
> >
> >
> > > I think what he did is exactly what I want to do now. I got a vague
view
> > > of the big picture, but I need more time to figure out the details. I
> > will
> > > certainly ask more questions about this later, but before that I need
to
> > > look at some other parts of the source code:) Again thank you for
> > checking!
> > >
> > > Cheers,
> > > Libo
> > >
> > >
> > > ------------------ Original message ------------------
> > > *From:* "Aleksandar Markovic";
> > > *Sendtime:* Thursday, Aug 22, 2019 4:23 PM
> > > *To:* "立";
> > > *Cc:* "qemu-devel";
> > > *Subject:* Re: [Qemu-devel] QEMU as ISS (Instruction Set Simulator)
> > >
> > > On Tue, Aug 20, 2019 at 12:12 PM 立 <zhlb29@foxmail.com> wrote:
> > >
> > > > I am working on a project that requires me to modify the ISA of the
> > MIPS
> > > > target.
> > >
> > >
> > > L.,
> > >
> > > How is it going?
> > >
> > > Aleksandar
> > >
> > >
> > >
> > > > I have been staring at the source code for about a week, but found
it
> > > > really difficult due to me being a young rookie and the sparse
> > comments.
> > > > Specifically, I need to extend MIPS, by adding some new instructions
> > and
> > > > new CPU registers to the current architecture, and that sounds
really
> > > easy.
> > > > I think the place for me to look at should be at the directory
> > > > ${qemu_root}/target/mips/. With a MIPS Instruction Set Manual
Release 6
> > > > handy, I have difficulty finding the source code where the ISA
resides.
> > > Is
> > > > it in op_helper.c? Or translate.c? Any guidance would be really
> > > > appreciated. Thank you very much in advance.
> > > >
> > > >
> > > > Cheers,
> > > > L.
> > >
> >