From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>,
Huacai Chen <chenhuacai@kernel.org>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 05/26] target/mips: Restrict mips_cpu_dump_state() to cpu.c
Date: Sun, 18 Apr 2021 12:02:07 -0700 [thread overview]
Message-ID: <d279b9a2-fdca-d616-6cb9-240b38f2bbb4@linaro.org> (raw)
In-Reply-To: <20210418163134.1133100-6-f4bug@amsat.org>
On 4/18/21 9:31 AM, Philippe Mathieu-Daudé wrote:
> As mips_cpu_dump_state() is only used once to initialize the
> CPUClass::dump_state handler, we can move it to cpu.c to keep
> it symbol local.
> Beside, this handler is used by all accelerators, while the
> translate.c file targets TCG.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> target/mips/internal.h | 1 -
> target/mips/cpu.c | 77 +++++++++++++++++++++++++++++++++++++++++
> target/mips/translate.c | 77 -----------------------------------------
> 3 files changed, 77 insertions(+), 78 deletions(-)
>
> diff --git a/target/mips/internal.h b/target/mips/internal.h
> index a8644f754a6..1c5674935aa 100644
> --- a/target/mips/internal.h
> +++ b/target/mips/internal.h
> @@ -79,7 +79,6 @@ extern const int mips_defs_number;
>
> void mips_cpu_do_interrupt(CPUState *cpu);
> bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
> -void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
> hwaddr mips_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
> int mips_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
> int mips_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index f354d18aec4..ac38a3262ca 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -145,6 +145,83 @@ void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val)
>
> #endif /* !CONFIG_USER_ONLY */
>
> +static void fpu_dump_state(CPUMIPSState *env, FILE * f, int flags)
> +{
> + int i;
> + int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64);
> +
> +#define printfpr(fp) \
> + do { \
> + if (is_fpu64) \
> + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \
> + " fd:%13g fs:%13g psu: %13g\n", \
> + (fp)->w[FP_ENDIAN_IDX], (fp)->d, \
> + (double)(fp)->fd, \
> + (double)(fp)->fs[FP_ENDIAN_IDX], \
> + (double)(fp)->fs[!FP_ENDIAN_IDX]); \
> + else { \
> + fpr_t tmp; \
> + tmp.w[FP_ENDIAN_IDX] = (fp)->w[FP_ENDIAN_IDX]; \
> + tmp.w[!FP_ENDIAN_IDX] = ((fp) + 1)->w[FP_ENDIAN_IDX]; \
> + qemu_fprintf(f, "w:%08x d:%016" PRIx64 \
> + " fd:%13g fs:%13g psu:%13g\n", \
> + tmp.w[FP_ENDIAN_IDX], tmp.d, \
> + (double)tmp.fd, \
> + (double)tmp.fs[FP_ENDIAN_IDX], \
> + (double)tmp.fs[!FP_ENDIAN_IDX]); \
> + } \
> + } while (0)
> +
Code motion, so,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> +
> + qemu_fprintf(f,
> + "CP1 FCR0 0x%08x FCR31 0x%08x SR.FR %d fp_status 0x%02x\n",
> + env->active_fpu.fcr0, env->active_fpu.fcr31, is_fpu64,
> + get_float_exception_flags(&env->active_fpu.fp_status));
> + for (i = 0; i < 32; (is_fpu64) ? i++ : (i += 2)) {
> + qemu_fprintf(f, "%3s: ", fregnames[i]);
> + printfpr(&env->active_fpu.fpr[i]);
... but since this macro has exacly one use, can we just inline it here? Or
turn it into a proper function?
r~
next prev parent reply other threads:[~2021-04-18 19:03 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-18 16:31 [PATCH 00/26] target/mips: Re-org to allow KVM-only builds Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 01/26] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-04-18 18:50 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 02/26] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-04-18 18:51 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 03/26] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-04-18 18:54 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 04/26] target/mips: Make CPU/FPU regnames[] arrays global Philippe Mathieu-Daudé
2021-04-18 18:59 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 05/26] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-04-18 19:02 ` Richard Henderson [this message]
2021-04-18 16:31 ` [PATCH 06/26] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-04-18 19:08 ` Richard Henderson
2021-04-18 22:46 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 07/26] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-04-18 19:09 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 08/26] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-04-18 19:13 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 09/26] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-04-18 20:43 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 10/26] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-04-18 20:44 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 11/26] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-04-18 19:13 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 12/26] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:15 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 13/26] target/mips: Move code related to physical addressing to sysemu/phys.c Philippe Mathieu-Daudé
2021-04-18 19:30 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 14/26] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:35 ` Richard Henderson
2021-04-18 22:45 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 15/26] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-04-18 19:35 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 16/26] target/mips: Move tlb_helper.c to tcg/sysemu/ Philippe Mathieu-Daudé
2021-04-18 19:40 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 17/26] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-04-18 19:40 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 18/26] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-04-18 19:47 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 19/26] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-04-18 19:52 ` Richard Henderson
2021-04-18 20:20 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 20/26] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-04-18 20:06 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 21/26] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-04-18 20:23 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 22/26] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-04-18 20:28 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 23/26] target/mips: Move helper.h -> tcg/helper.h.inc Philippe Mathieu-Daudé
2021-04-18 20:34 ` Richard Henderson
2021-04-18 21:20 ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 24/26] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-04-18 20:39 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 25/26] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-04-18 20:41 ` Richard Henderson
2021-04-18 16:31 ` [PATCH 26/26] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-04-18 20:42 ` Richard Henderson
2021-04-19 16:00 ` Willian Rampazzo
2021-04-18 16:45 ` [PATCH 00/26] target/mips: Re-org to allow KVM-only builds no-reply
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