From: Paolo Bonzini <pbonzini@redhat.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: ehabkost@redhat.com
Subject: Re: [PATCH] target/i386: Verify memory operand for lcall and ljmp
Date: Wed, 24 Mar 2021 18:00:43 +0100 [thread overview]
Message-ID: <d30a07ee-cbdd-d643-043f-49461af9b1da@redhat.com> (raw)
In-Reply-To: <20210324164650.128608-1-richard.henderson@linaro.org>
On 24/03/21 17:46, Richard Henderson wrote:
> These two opcodes only allow a memory operand.
>
> Lacking the check for a register operand, we used the A0 temp
> without initialization, which led to a tcg abort.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1921138
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/i386/tcg/translate.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
> index af1faf9342..880bc45561 100644
> --- a/target/i386/tcg/translate.c
> +++ b/target/i386/tcg/translate.c
> @@ -5061,6 +5061,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> gen_jr(s, s->T0);
> break;
> case 3: /* lcall Ev */
> + if (mod == 3) {
> + goto illegal_op;
> + }
> gen_op_ld_v(s, ot, s->T1, s->A0);
> gen_add_A0_im(s, 1 << ot);
> gen_op_ld_v(s, MO_16, s->T0, s->A0);
> @@ -5088,6 +5091,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
> gen_jr(s, s->T0);
> break;
> case 5: /* ljmp Ev */
> + if (mod == 3) {
> + goto illegal_op;
> + }
> gen_op_ld_v(s, ot, s->T1, s->A0);
> gen_add_A0_im(s, 1 << ot);
> gen_op_ld_v(s, MO_16, s->T0, s->A0);
>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
prev parent reply other threads:[~2021-03-24 17:02 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 16:46 [PATCH] target/i386: Verify memory operand for lcall and ljmp Richard Henderson
2021-03-24 17:00 ` Paolo Bonzini [this message]
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