From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v4 27/40] target/arm: Add VHE system register redirection and aliasing
Date: Fri, 6 Dec 2019 10:36:01 -0800 [thread overview]
Message-ID: <ef270139-bca6-e7d9-57b8-b5a7416bbb56@linaro.org> (raw)
In-Reply-To: <CAFEAcA8taFKOtz0pM-N3KRiQrguh43SNLSM__ZJH5xzVK5YkZg@mail.gmail.com>
On 12/6/19 9:24 AM, Peter Maydell wrote:
>> + union {
>> + /*
>> + * Offsets of the secure and non-secure fields in CPUARMState for
>> + * the register if it is banked. These fields are only used during
>> + * the static registration of a register. During hashing the bank
>> + * associated with a given security state is copied to fieldoffset
>> + * which is used from there on out.
>> + *
>> + * It is expected that register definitions use either fieldoffset
>> + * or bank_fieldoffsets in the definition but not both. It is also
>> + * expected that both bank offsets are set when defining a banked
>> + * register. This use indicates that a register is banked.
>> + */
>> + ptrdiff_t bank_fieldoffsets[2];
>> +
>> + /*
>> + * "Original" writefn and readfn.
>> + * For ARMv8.1-VHE register aliases, we overwrite the read/write
>> + * accessor functions of various EL1/EL0 to perform the runtime
>> + * check for which sysreg should actually be modified, and then
>> + * forwards the operation. Before overwriting the accessors,
>> + * the original function is copied here, so that accesses that
>> + * really do go to the EL1/EL0 version proceed normally.
>> + * (The corresponding EL2 register is linked via opaque.)
>> + */
>> + struct {
>> + CPReadFn *orig_readfn;
>> + CPWriteFn *orig_writefn;
>> + };
>
> Does this really need to be a union ? It's not clear to me
> why we know the two halves of it are never used at the same time.
We don't really need to use a union. I should probably change that. I think
AJB had the same question vs one of the previous revisions.
We know they're not used at the same time because bank_fieldoffsets is only
used *before* the structure is duplicated and added into the hash table
(overwriting .fieldoffset depending on the bank as they are duplicated), and
orig_{read,write}fn are only used *after* the structure has been added to the
hash table.
>> +static void el2_e2h_write(CPUARMState *env, const ARMCPRegInfo *ri,
>> + uint64_t value)
>> +{
>> + CPWriteFn *writefn;
>> +
>> + if (redirect_for_e2h(env)) {
>> + /* Switch to the saved EL2 version of the register. */
>> + ri = ri->opaque;
>> + writefn = ri->writefn;
>> + } else {
>> + writefn = ri->orig_writefn;
>> + }
>> + if (writefn == NULL) {
>> + writefn = raw_write;
>> + }
>> + writefn(env, ri, value);
>> +}
>
> I see how this works when we have a readfn or writefn,
> but how does the redirection work where the access
> goes directly via .fieldoffset ?
When there is no .writefn, we use raw_write, which uses fieldoffset.
r~
next prev parent reply other threads:[~2019-12-06 18:37 UTC|newest]
Thread overview: 98+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-03 2:28 [PATCH v4 00/40] target/arm: Implement ARMv8.1-VHE Richard Henderson
2019-12-03 2:28 ` [PATCH v4 01/40] target/arm: Define isar_feature_aa64_vh Richard Henderson
2019-12-03 2:28 ` [PATCH v4 02/40] target/arm: Enable HCR_E2H for VHE Richard Henderson
2019-12-03 2:29 ` [PATCH v4 03/40] target/arm: Add CONTEXTIDR_EL2 Richard Henderson
2019-12-03 2:29 ` [PATCH v4 04/40] target/arm: Add TTBR1_EL2 Richard Henderson
2019-12-10 9:14 ` Laurent Desnogues
2019-12-03 2:29 ` [PATCH v4 05/40] target/arm: Update CNTVCT_EL0 for VHE Richard Henderson
2019-12-03 2:29 ` [PATCH v4 06/40] target/arm: Split out vae1_tlbmask, vmalle1_tlbmask Richard Henderson
2019-12-03 6:25 ` Philippe Mathieu-Daudé
2019-12-03 22:01 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 07/40] target/arm: Simplify tlb_force_broadcast alternatives Richard Henderson
2019-12-03 2:29 ` [PATCH v4 08/40] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_* Richard Henderson
2019-12-04 10:38 ` Alex Bennée
2019-12-06 15:45 ` Peter Maydell
2019-12-06 18:00 ` Richard Henderson
2019-12-06 18:01 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 09/40] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2 Richard Henderson
2019-12-04 10:40 ` Alex Bennée
2019-12-06 15:46 ` Peter Maydell
2019-12-06 18:05 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 10/40] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E* Richard Henderson
2019-12-04 11:00 ` Alex Bennée
2019-12-06 15:47 ` Peter Maydell
2019-12-06 18:20 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 11/40] target/arm: Rename ARMMMUIdx_S1SE* to ARMMMUIdx_SE* Richard Henderson
2019-12-04 11:01 ` Alex Bennée
2019-12-06 15:47 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 12/40] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3 Richard Henderson
2019-12-04 11:02 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 13/40] target/arm: Rename ARMMMUIdx_S1E2 to ARMMMUIdx_E2 Richard Henderson
2019-12-04 11:03 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 14/40] target/arm: Recover 4 bits from TBFLAGs Richard Henderson
2019-12-04 11:43 ` Alex Bennée
2019-12-04 14:27 ` Richard Henderson
2019-12-04 15:53 ` Alex Bennée
2019-12-04 16:19 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 15/40] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits Richard Henderson
2019-12-04 11:48 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 16/40] target/arm: Rearrange ARMMMUIdxBit Richard Henderson
2019-12-04 11:56 ` Alex Bennée
2019-12-04 16:01 ` Philippe Mathieu-Daudé
2019-12-03 2:29 ` [PATCH v4 17/40] target/arm: Tidy ARMMMUIdx m-profile definitions Richard Henderson
2019-12-03 6:27 ` Philippe Mathieu-Daudé
2019-12-03 2:29 ` [PATCH v4 18/40] target/arm: Reorganize ARMMMUIdx Richard Henderson
2019-12-04 13:44 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 19/40] target/arm: Add regime_has_2_ranges Richard Henderson
2019-12-04 14:16 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 20/40] target/arm: Update arm_mmu_idx for VHE Richard Henderson
2019-12-04 14:37 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 21/40] target/arm: Update arm_sctlr " Richard Henderson
2019-12-03 2:29 ` [PATCH v4 22/40] target/arm: Update aa64_zva_access for EL2 Richard Henderson
2019-12-04 15:01 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 23/40] target/arm: Update ctr_el0_access " Richard Henderson
2019-12-04 16:11 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 24/40] target/arm: Add the hypervisor virtual counter Richard Henderson
2019-12-03 2:29 ` [PATCH v4 25/40] target/arm: Update timer access for VHE Richard Henderson
2019-12-04 18:35 ` Alex Bennée
2019-12-03 2:29 ` [PATCH v4 26/40] target/arm: Update define_one_arm_cp_reg_with_opaque " Richard Henderson
2019-12-04 18:58 ` Alex Bennée
2019-12-04 19:47 ` Richard Henderson
2019-12-04 22:38 ` Alex Bennée
2019-12-05 15:09 ` Richard Henderson
2019-12-06 15:53 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 27/40] target/arm: Add VHE system register redirection and aliasing Richard Henderson
2019-12-06 17:24 ` Peter Maydell
2019-12-06 18:36 ` Richard Henderson [this message]
2019-12-06 18:41 ` Peter Maydell
2019-12-06 18:53 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 28/40] target/arm: Add VHE timer " Richard Henderson
2019-12-06 17:33 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 29/40] target/arm: Flush tlb for ASID changes in EL2&0 translation regime Richard Henderson
2019-12-06 17:05 ` Peter Maydell
2020-01-28 0:04 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 30/40] target/arm: Flush tlbs for E2&0 " Richard Henderson
2019-12-06 17:14 ` Peter Maydell
2020-01-29 17:05 ` Richard Henderson
2019-12-03 2:29 ` [PATCH v4 31/40] target/arm: Update arm_phys_excp_target_el for TGE Richard Henderson
2019-12-06 16:59 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 32/40] target/arm: Update {fp,sve}_exception_el for VHE Richard Henderson
2019-12-06 16:50 ` [PATCH v4 32/40] target/arm: Update {fp, sve}_exception_el " Peter Maydell
2019-12-03 2:29 ` [PATCH v4 33/40] target/arm: check TGE and E2H flags for EL0 pauth traps Richard Henderson
2019-12-06 16:08 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 34/40] target/arm: Update get_a64_user_mem_index for VHE Richard Henderson
2019-12-06 16:46 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 35/40] target/arm: Update arm_cpu_do_interrupt_aarch64 " Richard Henderson
2019-12-06 16:03 ` Peter Maydell
2019-12-06 18:51 ` Richard Henderson
2019-12-06 19:15 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 36/40] target/arm: Enable ARMv8.1-VHE in -cpu max Richard Henderson
2019-12-06 15:57 ` Peter Maydell
2019-12-03 2:29 ` [PATCH v4 37/40] target/arm: Move arm_excp_unmasked to cpu.c Richard Henderson
2019-12-03 6:28 ` Philippe Mathieu-Daudé
2019-12-03 2:29 ` [PATCH v4 38/40] target/arm: Pass more cpu state to arm_excp_unmasked Richard Henderson
2019-12-03 6:29 ` Philippe Mathieu-Daudé
2019-12-03 2:29 ` [PATCH v4 39/40] target/arm: Use bool for unmasked in arm_excp_unmasked Richard Henderson
2019-12-03 6:30 ` Philippe Mathieu-Daudé
2019-12-03 2:29 ` [PATCH v4 40/40] target/arm: Raise only one interrupt in arm_cpu_exec_interrupt Richard Henderson
2019-12-06 15:57 ` Peter Maydell
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