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From: Palmer Dabbelt <palmer@sifive.com>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: qemu-riscv@nongnu.org, sagark@eecs.berkeley.edu,
	Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
	qemu-devel@nongnu.org, Atish Patra <Atish.Patra@wdc.com>,
	Alistair Francis <Alistair.Francis@wdc.com>
Subject: Re: [Qemu-devel] [PATCH v2] riscv: virt: Add cpu-topology DT node.
Date: Tue, 25 Jun 2019 03:20:04 -0700 (PDT)	[thread overview]
Message-ID: <mhng-7c1a8a81-ee0d-4e95-87b9-ef9543ad121c@palmer-si-x1e> (raw)
In-Reply-To: <20190624234144.10768-1-atish.patra@wdc.com>

On Mon, 24 Jun 2019 16:41:44 PDT (-0700), Atish Patra wrote:
> Currently, there is no cpu topology defined in RISC-V.
> Define a device tree node that clearly describes the
> entire topology. This saves the trouble of scanning individual
> cache to figure out the topology.
>
> Here is the linux kernel patch series that enables topology
> for RISC-V.
>
> http://lists.infradead.org/pipermail/linux-riscv/2019-June/005072.html
>
> CPU topology after applying this patch in QEMU & above series in kernel
>
> / # cat /sys/devices/system/cpu/cpu2/topology/thread_siblings_list
> 2
> / # cat /sys/devices/system/cpu/cpu2/topology/physical_package_id
> 0
> / # cat /sys/devices/system/cpu/cpu2/topology/core_siblings_list
> 0-7
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Thanks.  This is in the queue for 4.1, which is just pending Alistar's review
on those two Z patches I reworked.

> ---
>  hw/riscv/virt.c | 22 ++++++++++++++++++++--
>  1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index 84d94d0c42d8..45a1edcd6c4a 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -191,6 +191,7 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
>
>      for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
>          int cpu_phandle = phandle++;
> +        int intc_phandle;
>          nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
>          char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
>          char *isa = riscv_isa_string(&s->soc.harts[cpu]);
> @@ -203,9 +204,12 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
>          qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
>          qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu);
>          qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu");
> +        qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle);
> +        qemu_fdt_setprop_cell(fdt, nodename, "linux,phandle", cpu_phandle);
> +        intc_phandle = phandle++;
>          qemu_fdt_add_subnode(fdt, intc);
> -        qemu_fdt_setprop_cell(fdt, intc, "phandle", cpu_phandle);
> -        qemu_fdt_setprop_cell(fdt, intc, "linux,phandle", cpu_phandle);
> +        qemu_fdt_setprop_cell(fdt, intc, "phandle", intc_phandle);
> +        qemu_fdt_setprop_cell(fdt, intc, "linux,phandle", intc_phandle);
>          qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc");
>          qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0);
>          qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1);
> @@ -214,6 +218,20 @@ static void *create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap,
>          g_free(nodename);
>      }
>
> +    /* Add cpu-topology node */
> +    qemu_fdt_add_subnode(fdt, "/cpus/cpu-map");
> +    qemu_fdt_add_subnode(fdt, "/cpus/cpu-map/cluster0");
> +    for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
> +        char *core_nodename = g_strdup_printf("/cpus/cpu-map/cluster0/core%d",
> +                                              cpu);
> +        char *cpu_nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
> +        uint32_t intc_phandle = qemu_fdt_get_phandle(fdt, cpu_nodename);
> +        qemu_fdt_add_subnode(fdt, core_nodename);
> +        qemu_fdt_setprop_cell(fdt, core_nodename, "cpu", intc_phandle);
> +        g_free(core_nodename);
> +        g_free(cpu_nodename);
> +    }
> +
>      cells =  g_new0(uint32_t, s->soc.num_harts * 4);
>      for (cpu = 0; cpu < s->soc.num_harts; cpu++) {
>          nodename =


      reply	other threads:[~2019-06-25 10:27 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-24 23:41 [Qemu-devel] [PATCH v2] riscv: virt: Add cpu-topology DT node Atish Patra
2019-06-25 10:20 ` Palmer Dabbelt [this message]

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