From: Shaokun Zhang <zhangshaokun@hisilicon.com>
To: <linux-arm-kernel@lists.infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Marc Zyngier <maz@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Shaokun Zhang <zhangshaokun@hisilicon.com>,
Nianyao Tang <tangnianyao@huawei.com>
Subject: [PATCH] arm64: arch_timer: Ensure timer is enabled before using istatus
Date: Fri, 24 Jul 2020 17:47:17 +0800 [thread overview]
Message-ID: <1595584037-6877-1-git-send-email-zhangshaokun@hisilicon.com> (raw)
From: Nianyao Tang <tangnianyao@huawei.com>
In Arm ARM spec, there is a description for timer control register, when
the value of the ENABLE bit is 0, the ISTATUS field is UNKNOWN. We shall
only read and use ISTATUS when ENABLE is 1, otherwise ISTATUS may be
invalid.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Nianyao Tang <tangnianyao@huawei.com>
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
---
drivers/clocksource/arm_arch_timer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 6c3e84180146..0bbc2715de79 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -641,7 +641,8 @@ static __always_inline irqreturn_t timer_handler(const int access,
unsigned long ctrl;
ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, evt);
- if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
+ if ((ctrl & ARCH_TIMER_CTRL_ENABLE) &&
+ (ctrl & ARCH_TIMER_CTRL_IT_STAT)) {
ctrl |= ARCH_TIMER_CTRL_IT_MASK;
arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
evt->event_handler(evt);
--
2.7.4
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next reply other threads:[~2020-07-24 9:51 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 9:47 Shaokun Zhang [this message]
2020-07-24 10:22 ` [PATCH] arm64: arch_timer: Ensure timer is enabled before using istatus Marc Zyngier
2020-07-25 8:49 ` Shaokun Zhang
2020-07-25 9:23 ` Marc Zyngier
2020-07-28 2:18 ` Shaokun Zhang
2020-07-28 7:59 ` Marc Zyngier
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