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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 0/1] Display glitches fixes
Date: Fri,  4 Dec 2020 13:48:44 +0530	[thread overview]
Message-ID: <20201204081845.26528-1-anshuman.gupta@intel.com> (raw)

TGL chrome-OS platform has observed display glitches while
display brightness is being changed rapidly.
It creates a scenario where brightness is being changed simultaneously
with display flips updates in different threads.

Brightness update requires pps_lock, current pps_lock implementation
requires to get AUX power domain, which triggers DC3CO disallow/allow
sequence being async with display flips.

This triggers a race between dc3co exit delay and display flip,
and potentially causing a display glitch due to some display register
being programmed before completing dc3co exit delay.
Exactly which register programming causing this glitch is still
being work in progressed.

This patch adds a optimization to avoid unnecessary "DC off"
power well enable/disable(D3CO disallow/allow) noise around
brightness update.

This patch helps to remove the display glitch in case of simultaneous
brightness update and display flips.

Anshuman Gupta (1):
  drm/i915/dp: optimize pps_lock wherever required

 drivers/gpu/drm/i915/display/intel_dp.c | 47 +++++++++++++++++++++++--
 1 file changed, 45 insertions(+), 2 deletions(-)

-- 
2.26.2

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             reply	other threads:[~2020-12-04  8:32 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-04  8:18 Anshuman Gupta [this message]
2020-12-04  8:18 ` [Intel-gfx] [PATCH 1/1] drm/i915/dp: optimize pps_lock wherever required Anshuman Gupta
2020-12-11 14:13   ` Jani Nikula
2020-12-15  6:40     ` Anshuman Gupta
2020-12-04  9:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Display glitches fixes (rev2) Patchwork
2020-12-04 10:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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