From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Sasha Levin To: "stable@vger.kernel.org" , "linux-kernel@vger.kernel.org" CC: Michael Neuling , Michael Ellerman , Sasha Levin Subject: [PATCH AUTOSEL for 3.18 049/101] powerpc: Fix /proc/cpuinfo revision for POWER9 DD2 Date: Mon, 9 Apr 2018 00:35:59 +0000 Message-ID: <20180409003505.164715-49-alexander.levin@microsoft.com> References: <20180409003505.164715-1-alexander.levin@microsoft.com> In-Reply-To: <20180409003505.164715-1-alexander.levin@microsoft.com> Content-Language: en-US Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: From: Michael Neuling [ Upstream commit 64ebb9a208c6e66316329a6d9101815d1ee06fa9 ] The P9 PVR bits 12-15 don't indicate a revision but instead different chip configurations. From BookIV we have: Bits Configuration 0 : Scale out 12 cores 1 : Scale out 24 cores 2 : Scale up 12 cores 3 : Scale up 24 cores DD1 doesn't use this but DD2 does. Linux will mostly use the "Scale out 24 core" configuration (ie. SMT4 not SMT8) which results in a PVR of 0x004e1200. The reported revision in /proc/cpuinfo is hence reported incorrectly as "18.0". This patch fixes this to mask off only the relevant bits for the major revision (ie. bits 8-11) for POWER9. Signed-off-by: Michael Neuling Signed-off-by: Michael Ellerman Signed-off-by: Sasha Levin --- arch/powerpc/kernel/setup-common.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup= -common.c index 1362cd62b3fa..01b2950273cb 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c @@ -310,6 +310,10 @@ static int show_cpuinfo(struct seq_file *m, void *v) maj =3D ((pvr >> 8) & 0xFF) - 1; min =3D pvr & 0xFF; break; + case 0x004e: /* POWER9 bits 12-15 give chip type */ + maj =3D (pvr >> 8) & 0x0F; + min =3D pvr & 0xFF; + break; default: maj =3D (pvr >> 8) & 0xFF; min =3D pvr & 0xFF; --=20 2.15.1