From: Arnd Bergmann <arnd@arndb.de>
To: stable@vger.kernel.org, Jingoo Han <jingoohan1@gmail.com>,
Joao Pinto <Joao.Pinto@synopsys.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: Niklas Cassel <niklas.cassel@axis.com>,
Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
Joao Pinto <jpinto@synopsys.com>, Arnd Bergmann <arnd@arndb.de>,
Sasha Levin <alexander.levin@microsoft.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [BACKPORT 4.14.y 3/8] PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writable
Date: Fri, 22 Mar 2019 17:17:18 +0100 [thread overview]
Message-ID: <20190322161727.1153278-4-arnd@arndb.de> (raw)
In-Reply-To: <20190322161727.1153278-1-arnd@arndb.de>
From: Niklas Cassel <niklas.cassel@axis.com>
Certain registers that pcie-designware-ep tries to write to are read-only
registers. However, these registers can become read/write if we first
enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after
writing these registers.
Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
(cherry picked from commit 1cab826b30c6275d479a6ab1dea1067e15dbec62)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/pci/dwc/pcie-designware-ep.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c
index df317d390317..abcbf0770358 100644
--- a/drivers/pci/dwc/pcie-designware-ep.c
+++ b/drivers/pci/dwc/pcie-designware-ep.c
@@ -35,8 +35,10 @@ static void dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar)
u32 reg;
reg = PCI_BASE_ADDRESS_0 + (4 * bar);
+ dw_pcie_dbi_ro_wr_en(pci);
dw_pcie_writel_dbi2(pci, reg, 0x0);
dw_pcie_writel_dbi(pci, reg, 0x0);
+ dw_pcie_dbi_ro_wr_dis(pci);
}
static int dw_pcie_ep_write_header(struct pci_epc *epc,
@@ -45,6 +47,7 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc,
struct dw_pcie_ep *ep = epc_get_drvdata(epc);
struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ dw_pcie_dbi_ro_wr_en(pci);
dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, hdr->vendorid);
dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, hdr->deviceid);
dw_pcie_writeb_dbi(pci, PCI_REVISION_ID, hdr->revid);
@@ -58,6 +61,7 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc,
dw_pcie_writew_dbi(pci, PCI_SUBSYSTEM_ID, hdr->subsys_id);
dw_pcie_writeb_dbi(pci, PCI_INTERRUPT_PIN,
hdr->interrupt_pin);
+ dw_pcie_dbi_ro_wr_dis(pci);
return 0;
}
@@ -142,8 +146,10 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, enum pci_barno bar,
if (ret)
return ret;
+ dw_pcie_dbi_ro_wr_en(pci);
dw_pcie_writel_dbi2(pci, reg, size - 1);
dw_pcie_writel_dbi(pci, reg, flags);
+ dw_pcie_dbi_ro_wr_dis(pci);
return 0;
}
@@ -217,7 +223,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int)
val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL);
val &= ~MSI_CAP_MMC_MASK;
val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK;
+ dw_pcie_dbi_ro_wr_en(pci);
dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val);
+ dw_pcie_dbi_ro_wr_dis(pci);
return 0;
}
--
2.20.0
next prev parent reply other threads:[~2019-03-22 16:18 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-22 16:17 [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 1/8] scsi: ufs: fix wrong command type of UTRD for UFSHCI v2.1 Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 2/8] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Arnd Bergmann
2019-03-22 16:17 ` Arnd Bergmann [this message]
2019-03-22 16:17 ` [BACKPORT 4.14.y 4/8] PCI: endpoint: Use EPC's device in dma_alloc_coherent()/dma_free_coherent() Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 5/8] rtc: Fix overflow when converting time64_t to rtc_time Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 6/8] sched/cpufreq/schedutil: Fix error path mutex unlock Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 7/8] pwm-backlight: Enable/disable the PWM before/after LCD enable toggle Arnd Bergmann
2019-03-22 16:17 ` [BACKPORT 4.14.y 8/8] power: supply: charger-manager: Fix incorrect return value Arnd Bergmann
2019-03-26 2:26 ` [BACKPORT 4.14.y 0/8] candidates from spreadtrum 4.14 product kernel Greg KH
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