From: Viresh Kumar <viresh.kumar@linaro.org>
To: stable@vger.kernel.org, Julien Thierry <Julien.Thierry@arm.com>
Cc: Viresh Kumar <viresh.kumar@linaro.org>,
linux-arm-kernel@lists.infradead.org,
Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will.deacon@arm.com>,
Russell King <rmk+kernel@arm.linux.org.uk>,
Vincent Guittot <vincent.guittot@linaro.org>,
mark.brown@arm.com
Subject: [PATCH v4.4 V2 03/43] arm64: move TASK_* definitions to <asm/processor.h>
Date: Fri, 12 Jul 2019 10:57:51 +0530 [thread overview]
Message-ID: <d1358018a1c0558cf775865f5a497f689f1c0beb.1562908074.git.viresh.kumar@linaro.org> (raw)
In-Reply-To: <cover.1562908074.git.viresh.kumar@linaro.org>
From: Yury Norov <ynorov@caviumnetworks.com>
commit eef94a3d09aab437c8c254de942d8b1aa76455e2 upstream.
ILP32 series [1] introduces the dependency on <asm/is_compat.h> for
TASK_SIZE macro. Which in turn requires <asm/thread_info.h>, and
<asm/thread_info.h> include <asm/memory.h>, giving a circular dependency,
because TASK_SIZE is currently located in <asm/memory.h>.
In other architectures, TASK_SIZE is defined in <asm/processor.h>, and
moving TASK_SIZE there fixes the problem.
Discussion: https://patchwork.kernel.org/patch/9929107/
[1] https://github.com/norov/linux/tree/ilp32-next
CC: Will Deacon <will.deacon@arm.com>
CC: Laura Abbott <labbott@redhat.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Suggested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
---
arch/arm64/include/asm/memory.h | 15 ---------------
arch/arm64/include/asm/processor.h | 21 +++++++++++++++++++++
arch/arm64/kernel/entry.S | 2 +-
3 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index b42b930cc19a..959a1e9188fe 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -43,8 +43,6 @@
* (VA_BITS - 1))
* VA_BITS - the maximum number of bits for virtual addresses.
* VA_START - the first kernel virtual address.
- * TASK_SIZE - the maximum size of a user space task.
- * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
* The module space lives between the addresses given by TASK_SIZE
* and PAGE_OFFSET - it must be within 128MB of the kernel text.
*/
@@ -58,19 +56,6 @@
#define PCI_IO_END (MODULES_VADDR - SZ_2M)
#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
#define FIXADDR_TOP (PCI_IO_START - SZ_2M)
-#define TASK_SIZE_64 (UL(1) << VA_BITS)
-
-#ifdef CONFIG_COMPAT
-#define TASK_SIZE_32 UL(0x100000000)
-#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
- TASK_SIZE_32 : TASK_SIZE_64)
-#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
- TASK_SIZE_32 : TASK_SIZE_64)
-#else
-#define TASK_SIZE TASK_SIZE_64
-#endif /* CONFIG_COMPAT */
-
-#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
/*
* Physical vs virtual RAM address space conversion. These are
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index d08559528927..75d9ef6c457c 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -19,6 +19,10 @@
#ifndef __ASM_PROCESSOR_H
#define __ASM_PROCESSOR_H
+#define TASK_SIZE_64 (UL(1) << VA_BITS)
+
+#ifndef __ASSEMBLY__
+
/*
* Default implementation of macro that returns current
* instruction pointer ("program counter").
@@ -36,6 +40,22 @@
#include <asm/types.h>
#ifdef __KERNEL__
+/*
+ * TASK_SIZE - the maximum size of a user space task.
+ * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
+ */
+#ifdef CONFIG_COMPAT
+#define TASK_SIZE_32 UL(0x100000000)
+#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
+ TASK_SIZE_32 : TASK_SIZE_64)
+#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
+ TASK_SIZE_32 : TASK_SIZE_64)
+#else
+#define TASK_SIZE TASK_SIZE_64
+#endif /* CONFIG_COMPAT */
+
+#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
+
#define STACK_TOP_MAX TASK_SIZE_64
#ifdef CONFIG_COMPAT
#define AARCH32_VECTORS_BASE 0xffff0000
@@ -188,4 +208,5 @@ static inline void spin_lock_prefetch(const void *x)
int cpu_enable_pan(void *__unused);
+#endif /* __ASSEMBLY__ */
#endif /* __ASM_PROCESSOR_H */
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 586326981769..c849be9231bb 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -27,7 +27,7 @@
#include <asm/cpufeature.h>
#include <asm/errno.h>
#include <asm/esr.h>
-#include <asm/memory.h>
+#include <asm/processor.h>
#include <asm/thread_info.h>
#include <asm/asm-uaccess.h>
#include <asm/unistd.h>
--
2.21.0.rc0.269.g1a574e7a288b
next prev parent reply other threads:[~2019-07-12 5:29 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-12 5:27 [PATCH v4.4 V2 00/43] V4.4 backport of arm64 Spectre patches Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 01/43] arm64: barrier: Add CSDB macros to control data-value prediction Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 02/43] arm64: Implement array_index_mask_nospec() Viresh Kumar
2019-07-12 5:27 ` Viresh Kumar [this message]
2019-07-12 5:27 ` [PATCH v4.4 V2 04/43] arm64: Make USER_DS an inclusive limit Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 05/43] arm64: Use pointer masking to limit uaccess speculation Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 06/43] arm64: entry: Ensure branch through syscall table is bounded under speculation Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 07/43] arm64: uaccess: Prevent speculative use of the current addr_limit Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 08/43] arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 09/43] mm/kasan: add API to check memory regions Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 10/43] arm64: kasan: instrument user memory access API Viresh Kumar
2019-07-12 5:27 ` [PATCH v4.4 V2 11/43] arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user Viresh Kumar
2019-07-31 12:37 ` Mark Rutland
2019-08-01 3:38 ` Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 12/43] arm64: cpufeature: Test 'matches' pointer to find the end of the list Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 13/43] arm64: cpufeature: Add scope for capability check Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 14/43] arm64: Introduce cpu_die_early Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 15/43] arm64: Move cpu_die_early to smp.c Viresh Kumar
2019-07-31 12:35 ` Mark Rutland
2019-08-01 3:35 ` Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 16/43] arm64: Verify CPU errata work arounds on hotplugged CPU Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 17/43] arm64: errata: Calling enable functions for CPU errata too Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 18/43] arm64: Rearrange CPU errata workaround checks Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 19/43] arm64: Run enable method for errata work arounds on late CPUs Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 20/43] arm64: cpufeature: Pass capability structure to ->enable callback Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 21/43] drivers/firmware: Expose psci_get_version through psci_ops structure Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 22/43] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 23/43] arm64: Move post_ttbr_update_workaround to C code Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 24/43] arm64: Add skeleton to harden the branch predictor against aliasing attacks Viresh Kumar
2019-07-31 16:45 ` Mark Rutland
2019-08-01 5:20 ` Viresh Kumar
2019-08-06 12:18 ` Mark Rutland
2019-08-08 12:06 ` Viresh Kumar
2019-08-28 10:23 ` Viresh Kumar
2019-08-28 16:08 ` Mark Rutland
2019-07-12 5:28 ` [PATCH v4.4 V2 25/43] arm64: Move BP hardening to check_and_switch_context Viresh Kumar
2019-07-31 13:09 ` Julien Thierry
2019-08-01 5:09 ` Viresh Kumar
2019-08-01 6:30 ` Julien Thierry
2019-08-01 6:35 ` Viresh Kumar
2019-08-01 6:57 ` Greg KH
2019-08-01 7:05 ` Viresh Kumar
2019-08-01 7:34 ` Will Deacon
2019-08-01 7:41 ` Viresh Kumar
2019-08-01 8:43 ` Greg KH
2019-08-01 8:49 ` Julien Thierry
2019-07-12 5:28 ` [PATCH v4.4 V2 26/43] arm64: entry: Apply BP hardening for high-priority synchronous exceptions Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 27/43] arm64: entry: Apply BP hardening for suspicious interrupts from EL0 Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 28/43] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 29/43] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 30/43] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 31/43] arm64: cputype info for Broadcom Vulcan Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 32/43] arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 33/43] arm64: Branch predictor hardening for Cavium ThunderX2 Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 34/43] ARM: 8478/2: arm/arm64: add arm-smccc Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 35/43] arm/arm64: KVM: Advertise SMCCC v1.1 Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 36/43] arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 37/43] firmware/psci: Expose PSCI conduit Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 38/43] firmware/psci: Expose SMCCC version through psci_ops Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 39/43] arm/arm64: smccc: Make function identifiers an unsigned quantity Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 40/43] arm/arm64: smccc: Implement SMCCC v1.1 inline primitive Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 41/43] arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 42/43] arm64: Kill PSCI_GET_VERSION as a variant-2 workaround Viresh Kumar
2019-07-12 5:28 ` [PATCH v4.4 V2 43/43] arm64: futex: Mask __user pointers prior to dereference Viresh Kumar
2019-07-15 13:09 ` [PATCH v4.4 V2 00/43] V4.4 backport of arm64 Spectre patches Mark Rutland
2019-07-16 3:44 ` Viresh Kumar
2019-07-31 2:52 ` Viresh Kumar
2019-07-31 17:02 ` Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d1358018a1c0558cf775865f5a497f689f1c0beb.1562908074.git.viresh.kumar@linaro.org \
--to=viresh.kumar@linaro.org \
--cc=Julien.Thierry@arm.com \
--cc=catalin.marinas@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=marc.zyngier@arm.com \
--cc=mark.brown@arm.com \
--cc=mark.rutland@arm.com \
--cc=rmk+kernel@arm.linux.org.uk \
--cc=stable@vger.kernel.org \
--cc=vincent.guittot@linaro.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).