[PATCH 0/2] smbios: riscv: set correct SMBIOS processor family value

From: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
To: Simon Glass <sjg@chromium.org>
Cc: Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
	Ilias Apalodimas <ilias.apalodimas@linaro.org>,
	u-boot@lists.denx.de,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Subject: [PATCH 0/2] smbios: riscv: set correct SMBIOS processor family value
Date: Thu, 28 Dec 2023 08:30:22 +0100	[thread overview]
Message-ID: <20231228073024.6508-1-heinrich.schuchardt@canonical.com> (raw)

Many value of processor type exceed 0xff and have to be stored as u16
value. In the type 4 table set processor_family = 0xfe signaling that
field processor_family2 is used and write the actual value into the
processor_family2 field.

The values for RISC-V are:

* 0x200 for 32-bit
* 0x201 for 64-bit

With this series dmidecode shows

    Handle 0x0004, DMI type 4, 48 bytes
    Processor Information
	Socket Designation: Not Specified
	Type: Central Processor
	Family: RV64

for qemu-riscv64_smode_defconfig.

Heinrich Schuchardt (2):
  smbios: enable setting processor family > 0xff
  cpu: riscv: set correct SMBIOS processor family value

 drivers/cpu/riscv_cpu.c | 4 ++++
 lib/smbios.c            | 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

-- 
2.43.0