From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>,
u-boot@lists.denx.de, Heinrich Schuchardt <xypron.glpk@gmx.de>,
Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>
Subject: Re: [PATCH v2 2/4] nvme: pci: Enable for SPL
Date: Thu, 4 May 2023 13:57:10 +0530 [thread overview]
Message-ID: <CAN37VV5fpt5vem2xW9Hi5sgmjjwoQjfU4RviKtmMrc5KXB0T8Q@mail.gmail.com> (raw)
In-Reply-To: <CAPnjgZ0P9Xqw4OhGUnu9ppDGo+T94FksEMfUJYBH=DPh3Sh8CA@mail.gmail.com>
Hi Simon,
On Wed, May 3, 2023 at 6:58 AM Simon Glass <sjg@chromium.org> wrote:
>
> Hi Mayuresh,
>
> On Tue, 2 May 2023 at 10:19, Mayuresh Chitale <mchitale@ventanamicro.com> wrote:
> >
> > Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
> > for SPL which is required to auto configure the PCIe devices.
> >
> > Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> > ---
> > drivers/Makefile | 1 +
> > drivers/nvme/Makefile | 2 +-
> > drivers/pci/Kconfig | 7 +++++++
> > drivers/pci/pci-uclass.c | 3 ++-
> > 4 files changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index 58be410135..dc559ea7f7 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/
> > obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/
> > obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/
> > obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/
> > +obj-$(CONFIG_$(SPL_)NVME) += nvme/
> > obj-$(CONFIG_XEN) += xen/
> > obj-$(CONFIG_$(SPL_)FPGA) += fpga/
> > obj-y += bus/
> > diff --git a/drivers/nvme/Makefile b/drivers/nvme/Makefile
> > index fa7b619446..fd3e68a91d 100644
> > --- a/drivers/nvme/Makefile
> > +++ b/drivers/nvme/Makefile
> > @@ -4,4 +4,4 @@
> >
> > obj-y += nvme-uclass.o nvme.o nvme_show.o
> > obj-$(CONFIG_NVME_APPLE) += nvme_apple.o
> > -obj-$(CONFIG_NVME_PCI) += nvme_pci.o
> > +obj-$(CONFIG_$(SPL_)NVME_PCI) += nvme_pci.o
> > diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> > index ef328d2652..ecab6ddc7e 100644
> > --- a/drivers/pci/Kconfig
> > +++ b/drivers/pci/Kconfig
> > @@ -40,6 +40,13 @@ config PCI_PNP
> > help
> > Enable PCI memory and I/O space resource allocation and assignment.
> >
> > +config SPL_PCI_PNP
> > + bool "Enable Plug & Play support for PCI"
> > + default n
> > + help
> > + Enable PCI memory and I/O space resource allocation and assignment.
> > + This is required to auto configure the enumerated devices.
> > +
> > config PCI_REGION_MULTI_ENTRY
> > bool "Enable Multiple entries of region type MEMORY in ranges for PCI"
> > help
> > diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> > index 9343cfc62a..dff63a68ce 100644
> > --- a/drivers/pci/pci-uclass.c
> > +++ b/drivers/pci/pci-uclass.c
> > @@ -1140,7 +1140,8 @@ static int pci_uclass_post_probe(struct udevice *bus)
> > if (ret)
> > return log_msg_ret("bind", ret);
> >
> > - if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() &&
> > + if ((CONFIG_IS_ENABLED(PCI_PNP) || CONFIG_IS_ENABLED(SPL_PCI_PNP)) &&
>
> The CONFIG_IS_ENABLED() macro checks SPL_PCI_PNP when used in an SPL
> build, so you should not need this change.
Ok. Will remove it in the next version.
>
> > + ll_boot_init() &&
> > (!hose->skip_auto_config_until_reloc ||
> > (gd->flags & GD_FLG_RELOC))) {
> > ret = pci_auto_config_devices(bus);
> > --
> > 2.34.1
> >
>
> Regards,
> Simon
Thanks,
Mayuresh.
next prev parent reply other threads:[~2023-05-04 8:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-02 16:18 [PATCH v2 0/4] SPL NVme support Mayuresh Chitale
2023-05-02 16:18 ` [PATCH v2 1/4] spl: Add Kconfig options for NVME Mayuresh Chitale
2023-05-02 16:19 ` [PATCH v2 2/4] nvme: pci: Enable for SPL Mayuresh Chitale
2023-05-03 1:28 ` Simon Glass
2023-05-04 8:27 ` Mayuresh Chitale [this message]
2023-05-02 16:19 ` [PATCH v2 3/4] spl: Support loading a FIT from ext FS Mayuresh Chitale
2023-05-02 16:19 ` [PATCH v2 4/4] common: spl: Add spl NVMe boot support Mayuresh Chitale
2023-05-03 1:28 ` Simon Glass
2023-05-04 8:28 ` Mayuresh Chitale
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAN37VV5fpt5vem2xW9Hi5sgmjjwoQjfU4RviKtmMrc5KXB0T8Q@mail.gmail.com \
--to=mchitale@ventanamicro.com \
--cc=bmeng.cn@gmail.com \
--cc=rick@andestech.com \
--cc=sjg@chromium.org \
--cc=u-boot@lists.denx.de \
--cc=xypron.glpk@gmx.de \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).