From: Leo Liang <ycliang@andestech.com>
To: Chanho Park <chanho61.park@samsung.com>
Cc: Rick Chen <rick@andestech.com>, Simon Glass <sjg@chromium.org>,
<u-boot@lists.denx.de>
Subject: Re: [PATCH v2 3/3] timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE
Date: Mon, 4 Sep 2023 15:02:24 +0800 [thread overview]
Message-ID: <ZPWBAKPO5HBAzFRK@swlinux02> (raw)
In-Reply-To: <20230828094938.2061606-4-chanho61.park@samsung.com>
Hi Chanho,
On Mon, Aug 28, 2023 at 06:49:38PM +0900, Chanho Park wrote:
> timer_get_boot_us function is required to record the boot stages as
> us-based timestamp.
>
> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> ---
> drivers/timer/riscv_aclint_timer.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/timer/riscv_aclint_timer.c b/drivers/timer/riscv_aclint_timer.c
> index e29d527c8d77..8b67745bb4a2 100644
> --- a/drivers/timer/riscv_aclint_timer.c
> +++ b/drivers/timer/riscv_aclint_timer.c
> @@ -6,6 +6,7 @@
>
> #include <common.h>
> #include <clk.h>
> +#include <div64.h>
> #include <dm.h>
> #include <timer.h>
> #include <asm/io.h>
> @@ -44,6 +45,27 @@ u64 notrace timer_early_get_count(void)
> }
> #endif
>
> +#if CONFIG_IS_ENABLED(RISCV_MMODE) && CONFIG_IS_ENABLED(BOOTSTAGE)
> +ulong timer_get_boot_us(void)
> +{
> + int ret;
> + u64 ticks = 0;
> + u32 rate;
> +
> + ret = dm_timer_init();
> + if (!ret) {
> + rate = timer_get_rate(gd->timer);
> + timer_get_count(gd->timer, &ticks);
> + } else {
> + rate = RISCV_MMODE_TIMER_FREQ;
> + ticks = readq((void __iomem *)MTIME_REG(RISCV_MMODE_TIMERBASE,
> + RISCV_MMODE_TIMEROFF));
> + }
> +
> + return lldiv(ticks * 1001, (rate / 1000));
Why is this dividend 1001 ?
Best regards,
Leo
> +}
> +#endif
> +
> static const struct timer_ops riscv_aclint_timer_ops = {
> .get_count = riscv_aclint_timer_get_count,
> };
> --
> 2.39.2
>
next prev parent reply other threads:[~2023-09-04 7:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20230828094952epcas2p31c71a57ef3486cbd75f605057cc8085f@epcas2p3.samsung.com>
2023-08-28 9:49 ` [PATCH v2 0/3] bootstage support for risc-v Chanho Park
[not found] ` <CGME20230828094952epcas2p497990b22d236fdaf4239dc9df80e4c7a@epcas2p4.samsung.com>
2023-08-28 9:49 ` [PATCH v2 1/3] riscv: bootstage: correct bootstage_report guard Chanho Park
2023-09-04 6:41 ` Leo Liang
[not found] ` <CGME20230828094952epcas2p1826292dae2e93fb619cc5fa146bb0787@epcas2p1.samsung.com>
2023-08-28 9:49 ` [PATCH v2 2/3] riscv: timer: add timer_get_boot_us for BOOTSTAGE Chanho Park
2023-09-04 7:01 ` Leo Liang
2023-09-04 7:41 ` Chanho Park
[not found] ` <CGME20230828094953epcas2p3fc191dd7a0d387cfd987240b972c79b5@epcas2p3.samsung.com>
2023-08-28 9:49 ` [PATCH v2 3/3] timer: riscv_aclint_timer: " Chanho Park
2023-09-04 7:02 ` Leo Liang [this message]
2023-09-04 7:42 ` Chanho Park
2023-09-04 16:48 ` Simon Glass
2023-09-05 5:02 ` Chanho Park
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