On 16/06/16 10:40, Jan Beulich wrote:
> The IO-APIC address has variable bits determined by the PCI-to-ISA
> bridge, and the IO-APIC version should be read from the IO-APIC. (Note
> that there's still implicit rather than explicit agreement on the
> IO-APIC base address between qemu and the hypervisor.)
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

The status quo is not great, and I can see why you want to improve it.

However, I think that this is not the way to do that.  It ties HVMLoader
to the PIIX4 board in Qemu, and will break attempts to use Q35 or
something else.  (In Q35, the IO-APIC decode address comes from Chipset
Configuration Register, rather than ISA device config space).

~Andrew