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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
	Paul Durrant <Paul.Durrant@citrix.com>, Wei Liu <wl@xen.org>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [Xen-devel] [PATCH v5 07/10] x86/HVM: scale MPERF values reported to guests (on AMD)
Date: Tue, 24 Mar 2020 13:35:15 +0100	[thread overview]
Message-ID: <930cd2b2-544d-a1c5-2245-24087769b9e6@suse.com> (raw)
In-Reply-To: <6fa81b4d-528d-5c33-50c5-a18396b4383a@suse.com>

AMD's PM specifies that MPERF (and its r/o counterpart) reads are
affected by the TSC ratio. Hence when processing such reads in software
we too should scale the values. While we don't currently (yet) expose
the underlying feature flags, besides us allowing the MSRs to be read
nevertheless, RDPRU is going to expose the values even to user space.

Furthermore, due to the not exposed feature flags, this change has the
effect of making properly inaccessible (for reads) the two MSRs.

Note that writes to MPERF (and APERF) continue to be unsupported.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v3: New.
---
I did consider whether to put the code in guest_rdmsr() instead, but
decided that it's better to have it next to TSC handling.

--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3456,6 +3456,22 @@ int hvm_msr_read_intercept(unsigned int
         *msr_content = v->arch.hvm.msr_tsc_adjust;
         break;
 
+    case MSR_MPERF_RD_ONLY:
+        if ( !d->arch.cpuid->extd.efro )
+        {
+            goto gp_fault;
+
+    case MSR_IA32_MPERF:
+            if ( !(d->arch.cpuid->basic.raw[6].c &
+                   CPUID6_ECX_APERFMPERF_CAPABILITY) )
+                goto gp_fault;
+        }
+        if ( rdmsr_safe(msr, *msr_content) )
+            goto gp_fault;
+        if ( d->arch.cpuid->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+            *msr_content = hvm_get_guest_tsc_fixed(v, *msr_content);
+        break;
+
     case MSR_APIC_BASE:
         *msr_content = vcpu_vlapic(v)->hw.apic_base_msr;
         break;
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -397,6 +397,9 @@
 #define MSR_IA32_MPERF			0x000000e7
 #define MSR_IA32_APERF			0x000000e8
 
+#define MSR_MPERF_RD_ONLY		0xc00000e7
+#define MSR_APERF_RD_ONLY		0xc00000e8
+
 #define MSR_IA32_THERM_CONTROL		0x0000019a
 #define MSR_IA32_THERM_INTERRUPT	0x0000019b
 #define MSR_IA32_THERM_STATUS		0x0000019c



  parent reply	other threads:[~2020-03-24 12:35 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24 12:26 [Xen-devel] [PATCH v5 00/10] x86emul: further work Jan Beulich
2020-03-24 12:29 ` [Xen-devel] [PATCH v5 02/10] x86emul: support AVX512_BF16 insns Jan Beulich
2020-03-24 12:29 ` [Xen-devel] [PATCH v5 02/10] x86emul: support MOVDIRI insn Jan Beulich
2020-03-25 20:58   ` Andrew Cooper
2020-03-26  9:20     ` Jan Beulich
2020-03-24 12:30 ` [Xen-devel] [PATCH v5 01/10] x86emul: support AVX512_BF16 insns Jan Beulich
2020-03-25 20:02   ` Andrew Cooper
2020-03-27 18:20   ` Andrew Cooper
2020-03-30  6:40     ` Jan Beulich
2020-03-24 12:33 ` [Xen-devel] [PATCH v5 03/10] x86: determine HAVE_AS_* just once Jan Beulich
2020-03-25 21:12   ` Andrew Cooper
2020-03-26  9:50     ` Jan Beulich
2020-03-26 13:42       ` Anthony PERARD
2020-03-26 14:20         ` Jan Beulich
2020-04-09 12:24     ` Jan Beulich
2020-03-24 12:33 ` [Xen-devel] [PATCH v5 04/10] x86: move back clang no integrated assembler tests Jan Beulich
2020-03-24 12:34 ` [Xen-devel] [PATCH v5 05/10] x86emul: support MOVDIR64B insn Jan Beulich
2020-03-25 11:19   ` Paul Durrant
2020-03-25 11:46     ` Jan Beulich
2020-04-02 23:12   ` Andrew Cooper
2020-04-03  7:57     ` Jan Beulich
2020-04-03 15:13       ` Andrew Cooper
2020-04-03 15:25         ` Jan Beulich
2020-03-24 12:34 ` [Xen-devel] [PATCH v5 06/10] x86emul: support ENQCMD insn Jan Beulich
2020-03-24 12:35 ` Jan Beulich [this message]
2020-03-24 12:36 ` [Xen-devel] [PATCH v5 08/10] x86emul: support RDPRU Jan Beulich
2020-03-24 12:37 ` [Xen-devel] [PATCH v5 09/10] x86/HVM: don't needlessly intercept APERF/MPERF/TSC MSR reads Jan Beulich
2020-03-27  2:24   ` Tian, Kevin
2020-03-24 12:37 ` [Xen-devel] [PATCH v5 10/10] x86emul: support MCOMMIT Jan Beulich
2020-04-02 23:47   ` Andrew Cooper
2020-04-03  8:00     ` Jan Beulich
2020-04-03 15:00       ` Andrew Cooper
2020-04-03 15:09         ` Jan Beulich
2020-04-03 15:25           ` Andrew Cooper
2020-03-24 12:43 ` [Xen-devel] [PATCH v5 00/10] x86emul: further work Jan Beulich
2020-03-25 10:59   ` Paul Durrant
2020-03-25 11:41 ` Andrew Cooper
2020-03-25 11:45   ` Jan Beulich
2020-03-26 11:49 ` Jan Beulich

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