From: "Xu, Quan" <quan.xu@intel.com>
To: George Dunlap <George.Dunlap@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Tian, Kevin" <kevin.tian@intel.com>, Keir Fraser <keir@xen.org>,
Jan Beulich <jbeulich@suse.com>,
Dario Faggioli <dario.faggioli@citrix.com>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <stefano.stabellini@citrix.com>,
"Nakajima, Jun" <jun.nakajima@intel.com>,
"Wu, Feng" <feng.wu@intel.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH 2/2] IOMMU/MMU: Adjust low level functions for VT-d Device-TLB flush error.
Date: Fri, 18 Mar 2016 06:57:09 +0000 [thread overview]
Message-ID: <945CA011AD5F084CBEA3E851C0AB28894B867280@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <CAFLBxZZqY-fkNva-kfhOwsF9SLg2ePSdjEM9TiE40Uy5Lt1bWQ@mail.gmail.com>
On March 17, 2016 11:31pm, <George.Dunlap@eu.citrix.com> wrote:
> On Thu, Mar 17, 2016 at 6:54 AM, Quan Xu <quan.xu@intel.com> wrote:
> > Current code would be panic(), when VT-d Device-TLB flush timed out.
> > the panic() is going to be eliminated, so we must check all kinds of
> > error and all the way up the call trees.
> >
> > Signed-off-by: Quan Xu <quan.xu@intel.com>
> >
> > CC: Jun Nakajima <jun.nakajima@intel.com>
> > CC: Kevin Tian <kevin.tian@intel.com>
> > CC: George Dunlap <george.dunlap@eu.citrix.com>
> > CC: Keir Fraser <keir@xen.org>
> > CC: Jan Beulich <jbeulich@suse.com>
> > CC: Andrew Cooper <andrew.cooper3@citrix.com>
> > CC: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> > CC: Stefano Stabellini <stefano.stabellini@citrix.com>
> > CC: Julien Grall <julien.grall@arm.com>
> > CC: Feng Wu <feng.wu@intel.com>
> > CC: Dario Faggioli <dario.faggioli@citrix.com>
> > ---
> > xen/arch/x86/mm/p2m-ept.c | 2 +-
> > xen/drivers/passthrough/amd/iommu_init.c | 12 ++-
> > xen/drivers/passthrough/amd/pci_amd_iommu.c | 2 +-
> > xen/drivers/passthrough/arm/smmu.c | 10 ++-
> > xen/drivers/passthrough/iommu.c | 17 ++--
> > xen/drivers/passthrough/vtd/extern.h | 2 +-
> > xen/drivers/passthrough/vtd/iommu.c | 120
> ++++++++++++++++++--------
> > xen/drivers/passthrough/vtd/quirks.c | 26 +++---
> > xen/include/asm-x86/hvm/svm/amd-iommu-proto.h | 2 +-
> > xen/include/asm-x86/iommu.h | 2 +-
> > xen/include/xen/iommu.h | 6 +-
> > 11 files changed, 133 insertions(+), 68 deletions(-)
> >
> > diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c
> > index f9bcce7..fa6c710 100644
> > --- a/xen/arch/x86/mm/p2m-ept.c
> > +++ b/xen/arch/x86/mm/p2m-ept.c
> > @@ -825,7 +825,7 @@ out:
> > need_modify_vtd_table )
> > {
> > if ( iommu_hap_pt_share )
> > - iommu_pte_flush(d, gfn, &ept_entry->epte, order,
> vtd_pte_present);
> > + rc = iommu_pte_flush(d, gfn, &ept_entry->epte, order,
> > + vtd_pte_present);
>
> So this sort changes the meaning of the "rc" check near the end of the function,
> when we check whether we want to update altp2m.
>
> As it happens, I *think* it doesn't matter, because you can't have altp2m and
> passthrough enabled at the same time, right?
I think it is _not_.
I have gone through the altp2m design/design discussion. It looks Xen _can_ have altp2m and passthrough enabled at the same time.
Also you can refer to http://lists.xenproject.org/archives/html/xen-devel/2015-01/msg01963.html
Andrew, could you help me double check it?
>
> If so, this at least merits a comment above the altp2m check; something like:
>
> "NB that if altp2m is enabled, rc cannot be non-zero here due to
> iommu_pte_flush, since you can't have altp2m and pass-through enabled at the
> same time."
>
> If you *can* have both altp2m and pass-through, then we need to make sure
> that the altp2m gets updated when the hostp2m is updated, even if the iommu
> flush fails.
>
I think it _can_, and let's wait for the above check first.
Quan
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next prev parent reply other threads:[~2016-03-18 6:57 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-17 6:54 [PATCH 0/2] Check VT-d Device-TLB flush error Quan Xu
2016-03-17 6:54 ` [PATCH 1/2] IOMMU/MMU: Adjust top level functions for " Quan Xu
2016-03-17 7:32 ` Tian, Kevin
2016-03-17 7:58 ` Jan Beulich
2016-03-17 8:00 ` Tian, Kevin
2016-03-17 12:30 ` George Dunlap
2016-03-17 12:33 ` George Dunlap
2016-03-18 3:19 ` Xu, Quan
2016-03-18 8:09 ` Jan Beulich
2016-03-24 6:45 ` Xu, Quan
2016-03-18 7:54 ` Xu, Quan
2016-03-18 8:19 ` Jan Beulich
2016-03-18 9:09 ` Xu, Quan
2016-03-18 9:29 ` Jan Beulich
2016-03-18 9:38 ` Dario Faggioli
2016-03-18 9:48 ` Jan Beulich
2016-03-21 6:18 ` Tian, Kevin
2016-03-21 12:22 ` Jan Beulich
2016-03-24 9:02 ` Xu, Quan
2016-03-24 9:58 ` Jan Beulich
2016-03-24 14:12 ` Xu, Quan
2016-03-24 14:37 ` Jan Beulich
2016-03-17 17:14 ` Jan Beulich
2016-03-28 3:33 ` Xu, Quan
2016-03-29 7:20 ` Jan Beulich
2016-03-30 2:28 ` Xu, Quan
2016-03-30 2:35 ` Xu, Quan
2016-03-30 8:05 ` Jan Beulich
2016-03-17 6:54 ` [PATCH 2/2] IOMMU/MMU: Adjust low " Quan Xu
2016-03-17 7:37 ` Tian, Kevin
2016-03-18 2:30 ` Xu, Quan
2016-03-18 8:06 ` Jan Beulich
2016-03-21 5:01 ` Tian, Kevin
2016-03-17 15:31 ` George Dunlap
2016-03-18 6:57 ` Xu, Quan [this message]
2016-03-18 10:20 ` Jan Beulich
2016-03-25 9:27 ` Xu, Quan
2016-03-29 7:36 ` Jan Beulich
2016-04-11 3:09 ` Xu, Quan
2016-04-11 3:27 ` Xu, Quan
2016-04-11 16:34 ` Jan Beulich
2016-04-12 1:09 ` Xu, Quan
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