xen-devel.lists.xenproject.org archive mirror
 help / color / mirror / Atom feed
From: Tamas K Lengyel <tamas@tklengyel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Xen-devel <xen-devel@lists.xenproject.org>,
	Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Razvan Cojocaru <rcojocaru@bitdefender.com>
Subject: Re: [PATCH v4 5/8] arm/vm_event: get/set registers
Date: Mon, 30 May 2016 13:47:51 -0600	[thread overview]
Message-ID: <CABfawh=Yi7dw5Oqop_ZsmbTgh3kHnumpQ6JpegKJhz12BRTMNw@mail.gmail.com> (raw)
In-Reply-To: <574C453202000078000EFA44@prv-mh.provo.novell.com>

On Mon, May 30, 2016 at 5:50 AM, Jan Beulich <JBeulich@suse.com> wrote:
>>>> On 30.05.16 at 00:37, <tamas@tklengyel.com> wrote:
>> +struct vm_event_regs_arm32 {
>> +    uint32_t r0_usr;
>> +    uint32_t r1_usr;
>> +    uint32_t r2_usr;
>> +    uint32_t r3_usr;
>> +    uint32_t r4_usr;
>> +    uint32_t r5_usr;
>> +    uint32_t r6_usr;
>> +    uint32_t r7_usr;
>> +    uint32_t r8_usr;
>> +    uint32_t r9_usr;
>> +    uint32_t r10_usr;
>> +    uint32_t r12_usr;
>> +    uint32_t lr_usr;
>> +    uint32_t fp;
>> +    uint32_t pc;
>> +    uint32_t sp_usr;
>> +    uint32_t sp_svc;
>> +    uint32_t spsr_svc;
>> +};
>
> It would seem more natural for the "ordinary" registers to be
> arranged in the numerical sequence, i.e. fp, r12, sp, lr, pc.

Not sure I follow.

>
>> +struct vm_event_regs_arm64 {
>> +    uint64_t x0;
>> +    uint64_t x1;
>> +    uint64_t x2;
>> +    uint64_t x3;
>> +    uint64_t x4;
>> +    uint64_t x5;
>> +    uint64_t x6;
>> +    uint64_t x7;
>> +    uint64_t x8;
>> +    uint64_t x9;
>> +    uint64_t x10;
>> +    uint64_t x16;
>> +    uint64_t lr;
>> +    uint64_t fp;
>> +    uint64_t pc;
>> +    uint64_t sp_el0;
>> +    uint64_t sp_el1;
>> +    uint32_t spsr_el1;
>> +    uint32_t _pad;
>> +};
>
> My ARM knowledge is certainly quite limited, but the incomplete set
> of GPRs here is quite obvious: Is there a reason to not make all of
> them available here? And if there is, could the criteria of which
> registers got put here please be documented in a comment (so that
> the next person noticing the incomplete set won't ask again)?

There already is a comment in place that explains why we are not
sending the full set of registers here.

>
> I'm also puzzled by fp and lr - I'm not aware of registers of those
> names (and gas also doesn't accept them afaict).

Not sure why but Xen names x29 fp and x30 lr. See
include/asm-arm/arm64/processor.h.

>
>> +struct vm_event_regs_arm {
>> +    uint32_t cpsr; /* PSR_MODE_BIT is set iff arm32 is used below */
>
> Explicit padding missing after this one.

Ack.

Thanks,
Tamas

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel

  reply	other threads:[~2016-05-30 19:47 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-29 22:37 [PATCH v4 1/8] monitor: Rename vm_event_monitor_get_capabilities Tamas K Lengyel
2016-05-29 22:37 ` [PATCH v4 2/8] monitor: Rename vm_event_monitor_guest_request Tamas K Lengyel
2016-05-30  7:05   ` Razvan Cojocaru
2016-05-30 13:51   ` Jan Beulich
2016-05-29 22:37 ` [PATCH v4 3/8] monitor: Rename hvm/event to hvm/monitor Tamas K Lengyel
2016-05-30  7:08   ` Razvan Cojocaru
2016-05-30 13:53   ` Jan Beulich
2016-05-29 22:37 ` [PATCH v4 4/8] monitor: ARM SMC events Tamas K Lengyel
2016-06-01 11:37   ` Julien Grall
     [not found]     ` <CABfawhmO9tUG3-OcorfwqdOgZTkjoUk+u=dHySGonBDvobqyKw@mail.gmail.com>
     [not found]       ` <CABfawhmK2GAmQqZMhrgjYzeUZ_XaoyRUPuJxyPK5LJEHwsp5SA@mail.gmail.com>
     [not found]         ` <CABfawh=J1fwinTYKGvJNrFPOsGLSXz6U3GE8fxPz3-KsXSWfbQ@mail.gmail.com>
     [not found]           ` <CABfawhn7zvE=hn0hq1ryH+sW-jdkAXgZM1C2KxwZVUE8pbp8cQ@mail.gmail.com>
2016-06-01 15:41             ` Tamas K Lengyel
2016-06-02 14:23               ` Julien Grall
2016-06-02 22:31                 ` Tamas K Lengyel
2016-07-04 19:13                 ` Tamas K Lengyel
2016-07-04 20:02                   ` Julien Grall
2016-07-04 21:05                     ` Tamas K Lengyel
2016-07-05  9:58                       ` Julien Grall
2016-05-29 22:37 ` [PATCH v4 5/8] arm/vm_event: get/set registers Tamas K Lengyel
2016-05-30  7:09   ` Razvan Cojocaru
2016-05-30 11:50   ` Jan Beulich
2016-05-30 19:47     ` Tamas K Lengyel [this message]
2016-05-30 20:20       ` Julien Grall
2016-05-30 20:37         ` Tamas K Lengyel
2016-05-30 20:46           ` Razvan Cojocaru
2016-05-30 20:53             ` Tamas K Lengyel
2016-05-30 21:35           ` Julien Grall
2016-05-30 21:41             ` Tamas K Lengyel
2016-05-31  7:54           ` Jan Beulich
2016-05-31  8:06             ` Razvan Cojocaru
2016-05-31  8:30               ` Jan Beulich
2016-05-31 16:20             ` Tamas K Lengyel
2016-05-31  7:48       ` Jan Beulich
2016-05-31 16:28         ` Tamas K Lengyel
2016-06-01  8:41           ` Jan Beulich
2016-06-01 11:24             ` Julien Grall
2016-06-01 18:21               ` Tamas K Lengyel
2016-06-01 19:34                 ` Razvan Cojocaru
2016-06-01 19:43                   ` Julien Grall
2016-06-02  7:35                   ` Jan Beulich
2016-06-02  8:26                     ` Razvan Cojocaru
2016-06-02  9:38                       ` Jan Beulich
2016-06-02  9:42                         ` Razvan Cojocaru
2016-06-01 19:38                 ` Julien Grall
2016-06-01 19:49                   ` Julien Grall
2016-06-01 19:50                   ` Tamas K Lengyel
2016-05-29 22:37 ` [PATCH v4 6/8] tools/libxc: add xc_monitor_privileged_call Tamas K Lengyel
2016-05-29 22:37 ` [PATCH v4 7/8] tools/xen-access: add test-case for ARM SMC Tamas K Lengyel
2016-05-30  9:56   ` Wei Liu
2016-05-29 22:37 ` [PATCH v4 8/8] x86/vm_event: Add HVM debug exception vm_events Tamas K Lengyel
2016-05-30  7:29   ` Razvan Cojocaru
2016-05-30 14:16   ` Jan Beulich
2016-05-30 20:13     ` Tamas K Lengyel
2016-05-30 20:58       ` Andrew Cooper
2016-05-31  7:59       ` Jan Beulich
2016-06-01 21:46         ` Tamas K Lengyel
2016-06-01 22:17           ` Andrew Cooper
2016-06-02  0:01             ` Tamas K Lengyel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CABfawh=Yi7dw5Oqop_ZsmbTgh3kHnumpQ6JpegKJhz12BRTMNw@mail.gmail.com' \
    --to=tamas@tklengyel.com \
    --cc=JBeulich@suse.com \
    --cc=julien.grall@arm.com \
    --cc=rcojocaru@bitdefender.com \
    --cc=sstabellini@kernel.org \
    --cc=xen-devel@lists.xenproject.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).