From: Andrey Grodzovsky <andrey2805@gmail.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "Jürgen Walter • Quattru" <jw@quattru.com>, xen-devel@lists.xen.org
Subject: Re: Issues with PCI-Passtrough (VT-d) in HVM with Xen 4.6
Date: Fri, 17 Jun 2016 23:24:33 -0400 [thread overview]
Message-ID: <CAJphD_oSckiM_RYLX9=GG_8aBumDwF1sByA5RuLA72vpgRW3gw@mail.gmail.com> (raw)
In-Reply-To: <576170CA02000078000F5556@prv-mh.provo.novell.com>
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On Wed, Jun 15, 2016 at 9:14 AM, Jan Beulich <JBeulich@suse.com> wrote:
> >>> On 15.06.16 at 12:45, <andrey2805@gmail.com> wrote:
> > In reply to -
> > http://lists.xen.org/archives/html/xen-devel/2016-06/msg00622.html
> >
> > HI, I am working with Jurgen on the issue, as per Jan's request I tried
> to
> > write explicitly only latency timer to be written -
> > bool force_write = false;
> > if ((dev_data->permissive || xen_pcibk_permissive) &&
> > offset == PCI_CACHE_LINE_SIZE && size == 4)
> > force_write = true;
> > ...
> >
> > if ((force_write || !handled) && !err) {...}
> >
> > But then it exposed another issue, the command register field seems not
> to
> > be restored also
> > because I think the bits which are to be restored are not
> > in PCI_COMMAND_GUEST mask.
>
> Please be more precise: Which bits in particular are not getting
> set back to the needed values (I would guess the memory
> and/or I/O decode ones, which we specifically must not allow
> the guest to control, but I'd like to be certain)?
>
Indeed, 0x103 which would be MEMORY,IO and SERR.
>
> If my guess is correct, then I think rather than adding some
> hackish workaround to pciback you'd better see whether there's
> a way to cause a pci_disable_device() through your driver before
> the reset, and a pci_enable_device() after. Or actually, I think
> you can do this via plain config space writes from your driver: Try
> writing the Command Register with the two decode bits clear
> right before restoring the intended value (see the logic close to
> the top of command_write()).
>
> Jan
>
> So i tried the first option, as you suggested by writing
to /sys/bus/pci/devices/0000\:00\:00.0/enable
'0' == disable before reset and '1' == enable after from the test app, but
no writes get through to pic-back on DOM0 , only the reads.
But this basically still tries to write the MEMORY and IO bits to command
register down the call stack in pci_enable_resources
<http://lxr.free-electrons.com/ident?i=pci_enable_resources>
which would again be blocked in xen-pciback xen_pcibk_config_write or am I
missing something ?
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next prev parent reply other threads:[~2016-06-18 3:24 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-15 10:45 Issues with PCI-Passtrough (VT-d) in HVM with Xen 4.6 Andrey Grodzovsky
2016-06-15 13:14 ` Jan Beulich
2016-06-18 3:24 ` Andrey Grodzovsky [this message]
2016-06-20 6:57 ` Jan Beulich
-- strict thread matches above, loose matches on Subject: below --
2016-06-02 19:59 Sylwester Sosnowski
2016-06-02 20:06 ` Konrad Rzeszutek Wilk
2016-06-02 20:11 ` Sylwester Sosnowski
2016-06-03 7:24 ` Sylwester Sosnowski
2016-06-03 11:52 ` Jan Beulich
2016-06-03 12:02 ` Jürgen Walter
2016-06-03 13:26 ` Jan Beulich
2016-06-03 14:20 ` Jan Beulich
2016-06-04 14:36 ` Jürgen Walter
2016-06-06 7:59 ` Jan Beulich
2016-06-04 15:15 ` Jürgen Walter
2016-06-06 8:41 ` Jan Beulich
2016-06-06 9:09 ` Jürgen Walter
2016-06-06 9:43 ` Jan Beulich
2016-06-06 14:01 ` Boris Ostrovsky
2016-06-06 14:21 ` Jan Beulich
2016-06-06 14:45 ` Boris Ostrovsky
2016-06-02 19:49 Sylwester Sosnowski
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