From: "Sébastien Chaumat" <euidzero@gmail.com>
To: xen-devel@lists.xenproject.org
Subject: Re: [BUG]i2c_hid_acpi broken with 4.17.2 on Framework Laptop 13 AMD
Date: Mon, 18 Dec 2023 19:35:23 +0100 [thread overview]
Message-ID: <CAKm-Uma2concr2qJZNz4fbcRmHviC9dMGT0GpE+vuC+AiuTpdA@mail.gmail.com> (raw)
In-Reply-To: <CAKm-UmbFkO5RCDMTEgWBtEYtfO_LH=TKTh5TP=FyFFpdnbto4w@mail.gmail.com>
Le lun. 18 déc. 2023 à 18:04, Sébastien Chaumat <euidzero@gmail.com> a écrit :
>
>
>
> Le lun. 18 déc. 2023, 17:44, Jan Beulich <jbeulich@suse.com> a écrit :
>>
>> On 18.12.2023 17:21, Sébastien Chaumat wrote:
>> >>>>> On 05.12.2023 21:31, Sébastien Chaumat wrote:
>> >>> This issue seems that IRQ 7 (the GPIO controller) is natively fasteoi
>> >>> (so level type) while in xen it is mapped to oapic-edge instead of
>> >>> oapic-level
>> >>> as the SSDT indicates :
>> >>>
>> >>> Device (GPIO)
>> >>>
>> >>> {
>> >>> Name (_HID, "AMDI0030") // _HID: Hardware ID
>> >>> Name (_CID, "AMDI0030") // _CID: Compatible ID
>> >>> Name (_UID, Zero) // _UID: Unique ID
>> >>> Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
>> >>> {
>> >>> Name (RBUF, ResourceTemplate ()
>> >>> {
>> >>> Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, )
>> >>> {
>> >>> 0x00000007,
>> >>> }
>> >>> Any idea why ?
>> >>
>> >> Information coming from AML is required to be handed down by Dom0 to Xen.
>> >> May want checking that (a) Dom0 properly does so and (b) Xen doesn't screw
>> >> up in consuming that data. See PHYSDEVOP_setup_gsi. I wonder if this is
>> >> specific to it being IRQ7 which GPIO uses, as at the (master) PIC IRQ7 is
>> >> also the spurious vector. You may want to retry with the tip of the 4.17
>> >> branch (soon to become 4.17.3) - while it doesn't look very likely to me
>> >> that recent backports there were related, it may still be that they make
>> >> a difference.
>> >>
>> >
>> > testing with 4.17.3:
>> >
>> > Adding some printk in PHYSDEVOP_setup_gsi, I see (in xl dmesg) that
>> > (XEN) PHYSDEVOP_setup_gsi setup_gsi : gsi: 7 triggering: 1 polarity: 1
>> >
>> > but later on in dmesg I see :
>> > [ 1.747958] xen: registering gsi 7 triggering 0 polarity 1
>> >
>> > So triggering is flipped from 1 to 0 (cannot find the definition for
>> > those values).
>> > Could this be the culprit ?
>>
>> Possibly. Since it would be the kernel to invoke PHYSDEVOP_setup_gsi, it
>> looks as if the kernel was confused about which trigger mode to use. Have
>> you figured from where the kernel takes the two different values?
>>
side note : dom0 is PV.
next prev parent reply other threads:[~2023-12-18 18:35 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-03 9:56 [BUG]i2c_hid_acpi broken with 4.17.2 on Framework Laptop 13 AMD Sébastien Chaumat
2023-12-04 9:06 ` Jan Beulich
2023-12-04 19:17 ` Sébastien Chaumat
2023-12-05 8:17 ` Jan Beulich
2023-12-05 8:50 ` Sébastien Chaumat
2023-12-05 9:26 ` Sébastien Chaumat
2023-12-05 14:14 ` Sébastien Chaumat
2023-12-05 14:18 ` Jan Beulich
2023-12-05 16:19 ` Sébastien Chaumat
2023-12-05 20:31 ` Sébastien Chaumat
2023-12-06 7:15 ` Jan Beulich
2023-12-11 9:18 ` Sébastien Chaumat
2023-12-11 11:09 ` Sébastien Chaumat
2023-12-11 11:27 ` Jan Beulich
2023-12-11 14:17 ` Sébastien Chaumat
2023-12-11 14:21 ` Sébastien Chaumat
2023-12-18 16:21 ` Sébastien Chaumat
2023-12-18 16:44 ` Jan Beulich
2023-12-18 17:04 ` Sébastien Chaumat
2023-12-18 18:35 ` Sébastien Chaumat [this message]
2023-12-19 9:38 ` Jan Beulich
2023-12-19 13:15 ` Jan Beulich
2023-12-19 13:25 ` Jan Beulich
2023-12-19 15:15 ` Sébastien Chaumat
2023-12-19 19:03 ` Sébastien Chaumat
2023-12-19 23:06 ` Sébastien Chaumat
2023-12-19 23:11 ` Sébastien Chaumat
2023-12-19 23:50 ` Sébastien Chaumat
2023-12-20 0:23 ` Sébastien Chaumat
2023-12-20 10:06 ` Jan Beulich
2023-12-20 16:34 ` Sébastien Chaumat
2023-12-21 9:09 ` Jan Beulich
2023-12-21 12:40 ` Jan Beulich
2023-12-21 13:29 ` Juergen Gross
2023-12-21 15:22 ` Jan Beulich
2023-12-21 20:41 ` Sébastien Chaumat
2023-12-22 8:46 ` Jan Beulich
[not found] ` <CAKm-UmY126AfdGhWcZ3s9vwN9+ksVRRFEhOu0ZFMoDvxrqOibw@mail.gmail.com>
2023-12-22 14:38 ` Sébastien Chaumat
2023-12-27 10:20 ` Sébastien Chaumat
2023-12-27 11:43 ` Sébastien Chaumat
2024-01-02 20:23 ` Sébastien Chaumat
2024-01-16 15:52 ` Sébastien Chaumat
2024-01-16 16:18 ` Jan Beulich
2024-01-17 2:15 ` Mario Limonciello
2024-01-22 17:06 ` Sébastien Chaumat
2024-01-22 20:59 ` Mario Limonciello
2024-02-01 12:30 ` Sébastien Chaumat
2024-02-01 16:51 ` Sébastien Chaumat
2024-02-06 16:04 ` Sébastien Chaumat
2024-03-06 17:28 ` Sébastien Chaumat
2024-03-06 17:33 ` Mario Limonciello
2024-03-06 18:05 ` Sébastien Chaumat
2024-03-06 18:08 ` Mario Limonciello
2024-03-06 18:49 ` Sébastien Chaumat
2024-03-06 18:51 ` Mario Limonciello
2024-03-06 20:34 ` Sébastien Chaumat
2024-03-06 20:37 ` Mario Limonciello
2024-03-06 21:31 ` Marek Marczykowski-Górecki
2024-03-06 22:04 ` Mario Limonciello
2024-03-07 8:39 ` Jan Beulich
2024-03-08 9:55 ` Sébastien Chaumat
2023-12-19 13:33 ` Jan Beulich
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